Samsung STH-N271 Service Manual page 70

STH-N271 Circuit diagrams
4. STH-N271 BASE Circuit Diagram
U201
NOTE: LAYOUT AND SHIELDING IRDA DEVICE IS CRITICAL
VBAT
U204
D201
CN202
SIDE-KEY
1
1 KEY(0)
2
2 KEY(1)
3
3 KEY(2)
4
4 SCAN(0)
5
5
6
6
7
7
G G VAUX
U205
9 8
C214
1UF
D202
VCC
U206
C215
3
100NF 4
VCC2 VCC1
1
SRT R218
2 20K
C216 5
GND _RESET RST
100NF
VCC
R230 R231 R232
51 51 51
VCC
R233
3
2.2K
2 Q202
LED_EN
1
R247
R238
100
5.6K
VCC
C234
100NF
C201
VCTCXO_IN
100NF
R208
47K
R242
NC
R236
100K
REED_SW
SI2
SO2
C203 C233
SCK
10PF 100NF VCC
SEN
FSYNC
C207
15PF
R207
100K
Y201 CLK_FIL
R212 VCTCXO_PC
330K
RST
C208
POWER_HOLD
15PF
VCC IVCC
RINGER
C210 C211 C212
100NF 100NF 100NF
R213
100K
VCC
R237
10
C209
100NF
BVDD
VIBRATOR
C213 C230
100NF 100NF
IFIC_RESET
R216
BBCLK
100K
MODE_STS
VALID_STRB
BIN
WBDRX
WBDTX
BVDD VCC
RX_DATA
ZD210 ZD209
R204 RX_SYNC
270K
BATT
R205
1M R217
10K
1
BT201
ZD202
3
2
2
1
KEY(0:2)
VCC
SCAN(0:7)
R241
R240
5.1K 5.1K
SCAN(1)
ZD204
S5
3 4 1 2
SCAN(2)
SCAN(7)
2 MENU
S9
1
5 1 2
ON_SW SCAN(3)
SCAN(1)
SEND
SCAN(0)
S13
1 2
SCAN(4)
SCAN(2)
ZD205
1
S17
3 4 SCAN(5) 1 2
SCAN(3)
2
4
S4
1 5
SCAN(7) 1 2
SCAN(4)
7
Q204
D210
S16
1 2
3 SCAN(5)
2
RED *
ALT_LED
C221
47PF
1
Q206
D211
3
2
GREEN
SVC_LED
C222
47PF 1
SAMSUNG Proprietary-Contents may change without notice
R243
NC
R201
10K
R211
100K
N2
SI2
P2
SO2
N1
SCK2
N3
SEN2
M1
FSYNC
F13
GP_OUT
G4
CLK_SEL_0
G3
CLK_SEL_1
F1
XIN
E1
XOUT
F3
VCTCXO
F4
VCTCXO_PC
B2
32K_XIN
B1
32K_XOUT
A2
RESET
C3
POWER_HOLD
C2
POWER_FAIL
D4
EDD1
J4
EDD2
R8 U203
EDD3
H15
EDD4
D12
EDD5
F2
VCTCXO_VDD
E2
VCTCXO_GND
R1
IVDD1
R16
IVDD2
A7
IVDD3
C7
IVDD4
C1
BVDD
A1
OSC_32K_GND
H1
DGND1
P1
DGND2
T8
DGND3
T16
DGND4
H14
DGND5
C12
DGND6
D8
DGND7
B7
DGND8
E3
AGND
H3
IFIC_RESET
H2
BBCLK
M2
MODE_STS
J1
VALID_STRB
J3
BIN
G1
WBDRX
G2
WBDTX
L2
RX_DATA
L3
RX_SYNC
4
5
NOTE: TDMA EVENT -SPARE TIMMING SIGNALS
RTS
ZD201
4 3
DTR
S6 S7
1 2 1 2 2
BATT
1
SCROLL ENTER 5
CTS
S10 S21
1 2 1 2
CLR PWR_END
ON_SW
S14 S15
1 2 1 2
2 3
S18 S19
1 2 1 2
DSR
ZD203
5 6
S8 S12
4
1 2 1 2 3
DP_RX_DATA
8 9 2
S20 S22 5 1
DP_TX_DATA
1 2 1 2
0 #
HP_PWR
ZD206
4 3
CD
2
1
5
RI BOOT
11-10
AVCC
ARM_TDI
P201
ARM_TDO
P202
ARM_TMS
R206 P203
SLOT_T
P206
100K
R244
0
R245 GBOOT
0
R210 BOOT
NC
VCC
R209 VCC
100K
M15
MEM8/16
M14
CS_RES2 DISPLAY_CS
M13
CS_RES1 SRAM_CS
N16
FLASH_CS FLASH_CS
P16
SRAM_CS
T15
UBE UBE
T14
DATA(0:15)
MEMOEB MEMOEB
T13
MEMWEB MEMWEB
N15
DATA(15)
D15
N14
DATA(14)
D14
N13
DATA(13)
D13
P15
DATA(12)
D12 DATA(0:15)
P14
D11 DATA(11)
R15
DATA(10) DATA(15)
D10
R14
D9 DATA(9) DATA(14)
P13
DATA(8) DATA(13)
D8
R13
D7 DATA(7) DATA(12)
N12
DATA(6) DATA(11)
D6
P12
D5 DATA(5) DATA(10)
R12
DATA(4) DATA(9)
D4
N11
D3 DATA(3) DATA(8)
P11
DATA(2) DATA(7)
D2
R11
D1 DATA(1) ADD(0:21) DATA(6)
N10
DATA(0) DATA(5)
D0
P10
A21 ADD(21) DATA(4)
R10
ADD(20) DATA(3)
A20
N9
ADD(19) DATA(2)
A19
P9
ADD(18) DATA(1)
A18
R9
ADD(17) DATA(0)
A17
N8
A16 ADD(16)
P8
ADD(15)
A15 VCC
N7
A14 ADD(14)
P7
ADD(13)
A13
R7
A12 ADD(12)
N6
ADD(11)
A11
P6
A10 ADD(10)
R6 R215
ADD(9)
A9
P5 NC
A8 ADD(8)
N5
ADD(7)
A7
R5
A6 ADD(6)
R4
ADD(5)
A5
P4
A4 ADD(4)
N4
ADD(3)
A3
R3
ADD(2)
A2
P3
ADD(1)
A1
R2
ADD(0)
A0
T11 SIN_2
SIN_2
T10 SOUT_2
Q203
SOUT_2 R246
NC
C_F
3
1
CARR_ON
2 C204
C224
NC
NC
VCC
R248
100K
DP_RX_DATA NOTE: BOOT SHOULD BE PULLED LOW FOR CABLE DETECTION
R239
47K
PDM
BOOT
C220
SCLK
100NF
22
DSR
SIN_2
DO
SOUT_2
22
TX_AUDIO RX_AUDIO
C_F
22
C218 22
DP_RX_DATA
NC
22
DP_TX_DATA
22
HP_PWR
22
RI
22
CD
V_F
22
RTS
BATT
22
CTS
22
DTR
NC
V_F
C223
10NF
ZD208
5
1
SCLK SIN_2 NOTE: WAITING FOR REPLAY FROM SAMSUNG ABOUT C_F PIN
2
4
BATT 3
DO
ZD207
5
SOUT_2 1 C_F
2
4 3 C234(225,226,227,228,229)
RX_AUDIO
JTAG
BOOT BOOT
VCC VBATT
GND
HP_PWR HPPWR
SIN_2 RX
SOUT_2 TX
C205
C206
100NF 100NF
U202
D10
F-VCC
E4
VPP ADD(0:21)
D9
S-VCC
A10 A3
A20 ADD(21)
F-VCCQ
A19 E5
ADD(20)
B7 A18 G3
ADD(19)
DQ15
B9 A17 G4
DQ14 ADD(18)
C7 A16 B3
ADD(17)
DQ13
D7 A15 A5
DQ12 ADD(16)
E6 A14 A6
ADD(15)
DQ11
E8 A7
A13
DQ10 ADD(14)
F7 A12 A8
ADD(13)
DQ9
F8 A4
A11
DQ8 ADD(12)
B10 A10 B5
ADD(11)
DQ7
C8 B6
A9
DQ6 ADD(10)
C10 A8 B4
ADD(9)
DQ5
C9 G5
A7
DQ4 ADD(8)
E10 A6 G6
ADD(7)
DQ3
E9 H4
A5 ADD(6)
DQ2
F10 A4 H5
ADD(5)
DQ1 VCC
F9 A3 G7
ADD(4)
DQ0
A2 G8
ADD(3)
A1 G9
ADD(2)
A0 H6
ADD(1)
R214
A1
NC1
100K
A2
NC2
A11 F-CE# H7
NC3 FLASH_CS
A12 S-CS2 D8
NC4
C4 G10
S-CS1#
NC5 SRAM_CS
H1
NC6
H2
NC7
H3 S-UB# F4
NC8 UBE
H10 S-LB# F3
NC9 ADD(0)
H11
NC10
H12 F-WP# E3
NC11 FLASH_WP
F-RP# D4
RST
S-OE# F5
MEMOEB
H8 F-OE# H9
F-VSS
A9 S-WE# B8
F-VSS MEMWEB
D3 C3
S-VSS F-WE#
CN201
1
RESERVED0
2
RESERVED1
R220 3
DSR
R221 7
RX_AUDIO
8
GND1
9
C/F1
10
GND2
R223
11
TX_AUDIO
12
GND3
R224
13
DP_RX_DATA
R225 14
DP_TX_DATA
R226
R227 16
RI
R228 17
CD
19
GND4
R229 20
RTS
R234 23
CTS
R235 24
DTR
25
GND5
26
C/F2
R222
C219
NC
BT201
AU201
RV205
TP220
CN202
Q206
R248(R202,219)
U208(207)
D212 STH-N271_BASE
ZD210
Y201