Circuit Description - Samsung STH-N271 Service Manual

Single band mobile cellular phone
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ARM Address Range
0000 0000
0000 0003
0000 0004
0000 1FFF
0002 0000
0002 0FFF
0004 0000
0005 FFFF
0080 0000
00FF FFFF
0100 0000
017F FFFF
0180 0000
01FF FFFF
0200 0000
027F FFFF
HOST CPU (inside of BEC:U203)
ARM7TDMI 32-bit microprocessor is used for the main call processing. The CPU controls all the circuitry. The
reference clock 14.4 MHz, coming from the output of the TCXO (OSC302), is connected to VCTCXO_IN (pin
F3). Digital Only, additional crystal oscillator (Y201) of 32.768kHz is connected to pin B2 of the BEC. The
interface circuitry consists of reset circuit, address bus (A0-A21), data bus (AD0-AD15), control signals
(MEMWEB, MEMOEB, SRAM_CS, FLASH_CS, DISPLAY_CS, UBE etc), GPIOs, and the communication ports.
The communication ports includes the UART1 and 2, the JTAG, and the SCI. The UART1 supports HP
equipment interface, down loading, and data service. The UART2 and the JTAG are used for the software
debugging. The SCI supports the Diagnostic Monitor (DM) function.
FLASH ROM (inside of U202)
The 32Mbit FLASH ROM is used to store code of the application program. Using the down-loader program,
this application program can be changed even after the mobile is fully assembled.
SRAM (inside of U202)
The 4Mbit SRAM is used to store the internal flag information, call processing data, and timer data.
Key Pad
The Key Pad is belong to main board. For key-press recognition, the structure of key is consisted of 8 x 3
matrix, which is used GPIO input signal SCAN0-7 and GPIO output signal KEY0-2 of BEC.
LCD
LCD module is connected to main board directly by U103. This contains an LCD controller,. An LCD controller
controls the information of displaying from the BEC (parallel 8-bit data) to the LCD.
BASEBAND ENGIN (inside of U203)
This part mainly interface with IFC (U101) and RF part. As for interface of IFC, that will be explained detail in
next section. As important signals are PREAMP_G for receiver path, PA-GATE, ALC_EN for transmitter path,
PLL_DATA, PLL_CLK, PLL_STRB1 for PLL synthesizer, RX_BAT, TX_BAT for power management.
Table2-1. ARM Memory Map
ARM Memory Map
Data
32
32
32
32/16
8/16
8/16
8/16
8/16
SAMSUNG Proprietary-Contents may change without notice
Block Size
4 Byte
Internal ROM
8K Byte
Internal RAM
4K Byte
Internal ROM
NA
Internal Peripherals
Up to 8 M Byte
Up to 8 M Byte
Up to 8 M Byte
Up to 8 M Byte
11-3
STH-N271

Circuit Description

Device Name
Remarks
R
R/W
R
R/W
SRAM_CS
R/W
FLASH_CS
R/W
CS_RES1
R/W
CS_RES2
R/W

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