Samsung STH-N271 Service Manual page 31

5. STH-N271 Frequency Synthesizer Circuit and
Spurious Radiation Suppression Circuit
1. Frequency Synthesizer Circuit
The PLL (Phase Lock Loop) block consists of VC-TCXO (OSC302), PLL (belong to RF chip, U304), RF VCO
(OSC301), IF VCO (OSC303), and loop filter.
The VC_TCXO is a reference source of the frequency synthesizer. It provides 14.4MHz-reference frequency
to PLL part. It is a voltage controlled temperature compensated crystal oscillator having 14.4MHz-°æ
2.0ppm frequency stability over all useful temperature range. The control voltage makes a correct
frequency tuning.
The RF VCO generates the RF local signal having 998 ~ 1025MHz frequency range with the voltage control.
It has maximum -114dBc/1Hz C/N offset and -3 ± 3dBm output power.
The IF VCO generates the intermediate frequency having 175.05MHz frequency range with the voltage
control. It has maximum -102dBc/1Hz C/N offset and -3 ± 3dBm output power.
The PLL consist of PLL1 (RF section) and PLL2 (IF section) which interior decorated RF chipset (U304). The
reference divider in the PLL part divides the frequency of VC_TCXO. This reference frequency is supplied
to one of the inputs of phase detector. The signal generated at VCO goes into another stage of the phase
detector through a pre-scaler and a programmable divider. At this point the error proportional to the phase
difference of the two inputs occurs. This phase error is applied to the frequency control input stage of VCO
through the loop filter, which consists of resistor and capacitor.
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