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T-SGPIO Headers
Two SGPIO (Serial-Link General
Purpose Input/Output) headers (T-
SGPIO-1/T-SGPIO-2) are located
on the motherboard. These headers
support serial link interfaces for the
onboard SATA and SAS connectors.
See the table on the right for pin defini-
tions. Refer to the board layout below
for the location.
Chassis Intrusion
A Chassis Intrusion header is located
at JL1 on the motherboard. Attach an
appropriate cable from the chassis to
inform you of a chassis intrusion when
the chassis is opened.
FAN5
P1-DIMM3A
KB/MS
P1-DIMM3B
FAN6
USB
P1-DIMM2A
0/1/2/3
P1-DIMM2B
P1-DIMM1A
P1-DIMM1B
CPU1
LAN1/2
Slot7 PCI-E 2.0x4
82574
LAN
Slot6 PCI-E 2.0 x16
CTRL
Slot5 PCI-E 2.0x4
82574
LAN
PXH
CTRL
JI2C1
JI2C2
Slot4 PCI-E x4
Audio
CTRL
Slot3 PCI-X 133/100MHz
Slot2 PCI-X 133/100MHz
Slot1 PCI-X 133/100MHz
USB8
Audio FP
CD1
CNF2_2
USB6/7 USB4/5
CNF_1
PWR SMB
JPW3
CPU2
P2-DIMM1B
P2-DIMM1A
P2-DIMM2B
P2-DIMM2A
P2-DIMM3B
P2-DIMM3A
X8DA6/E
Rev. 2.01
Intel 5520
IOH-36D
Battery
BIOS
Intel
LSI
ICH10R
2008
JBT1
South Bridge
SAS CTRL
I-SATA4
I-SATA5
C
I-SATA1
I-SATA2
I-SATA0
I-SATA3
JLPC80
JL1
JWD1
2-23
T-SGPIO
Pin Definitions
Pin#
Definition
1
NC
3
Ground
5
Load
7
NC
Note: NC= No Connections
Chassis Intrusion
Pin Definitions (JL1)
Pin#
Definition
1
Intrusion Input
2
Ground
JPW2
JPW1
FAN1
FAN7/CPU2
LE1
JF1
S/IO
A
T-SGPIO1
JIBTN1
B
T-SGPIO2
JPS1
FAN4
Chapter 2: Installation
Pin
Definition
2
NC
4
Data
6
Ground
8
NC
A.T-SGPIO 1
B. T-SGPIO 2
C. Chassis Intrusion
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