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Chipset Overview
Built upon the functionality and the capability of the Intel 5520 platform, the
X8DA6/X8DAE motherboard provides the performance and feature set optimized
for dual-processor-based high-end workstations, CAD systems and intensive-
application platforms. The 5500/5600 Series Processor platform consists of the
5500/5600 Series Processor (LGA 1366) processor, the 5520 (IOH-36D), and the
ICH10R (South Bridge). With the Intel QuickPath interconnect controller built in,
the 5500/5600 Series Processor platform is the first dual-processing platform that
offers the next generation point-to-point interconnect interface, replacing the cur-
rent Front Side Bus Technology, providing substantial performance enhancement
by utilizing serial link interconnections with increased bandwidth and scalability.
The IOH-36D connects to each processor through an independent QuickPath
Interconnect link. Each link consists of 20 pairs of unidirectional differential lanes
for transmission and receiving in addition to a differential forwarded clock. A
full-width QuickPath interconnect link pair provides 84 signals. Each processor
supports two QuickPath links, one going to the other processor, and the other to
the 5520 chip.
The Intel 5520 platform supports up to 36 PCI Express Gen2 lanes, and the 5520
IOH-36D supports peer-to-peer read and write transactions. The ICH10R provides
up to 6 PCI-Express ports, six SATA ports and nine USB connections.
In addition, the Intel 5520 platform also offers a wide range of RAS (Reliability,
Availability and Serviceability) features. These features include memory interface
ECC, x4/x8 Single Device Data Correction (SDDC), Cyclic Redundancy Check
(CRC), parity protection, out-of-band register access via SMBus, memory mirror-
ing, and Hot-plug support on the PCI-Express Interface.
Main Features of the 5500/5600 Series Processor and the
5520 Chipset
•
Four processor cores in each processor with 8MB shared cache among cores
•
Two full-width Intel QuickPath interconnect links, up to 6.4 GT/s of data transfer
rate in each direction
•
Virtualization Technology, Integrated Management Engine supported
•
Point-to-point cache coherent interconnect, Fast/narrow unidirectional links, and
Concurrent bi-directional traffic
•
Error detection via CRC and Error correction via Link level retry
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Chapter 1: Introduction
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