Advertisement
FRONT PANEL
CON202
1
2
FPDOUT
3
XFPCLK
4
XFPSEL
5
XFPDIN
6
REM_BUS_P
REM_BUS_P
7
IRRCV
8
+5V_DISPLAY
9
10
11
12
13
14
REM_BUS_N
-9V_OUT
-13V5_OUT
-19V_OUT
REM_BUS_N
15
16
MOLEX
52806
DGND
+3V3D
SDRAM decoupling on bottom of board
C256
C257
C258
1N0
1N0
1N0
50V
50V
50V
0603
0603
0603
DGND
R225
PR200
RAMCKE
67
CKE
1K0
PR201
PCLK
68
CLK
0W063
0603
PR202
RAMBA0
22
BA0
NF
PR203
RAMBA1
23
PR253
BA1
IC203
C217
100N
PR204
RAMWE*
17
WE
16V
18
PR205
RAMCAS*
CAS
0603
19
PR206
RAMRAS*
RAS
20
NF
PR207
RAMCS*
CS
SDRAM
DGND
RAMADD11
21
A11 (NC)
PR208
RAMADD10
24
SDRAM DECOUPLING
A10/AP
+3V3D
PR209
RAMADD9
66
A9
PR210
RAMADD8
65
A8
PR211
RAMADD7
64
A7
PR212
RAMADD6
63
A6
C212
C213
C214
C215
PR213
RAMADD5
62
IC MEM SDRAM 512KX32BITX4 7NS
A5
100N
100N
100N
100N
PR214
RAMADD4
61
A4
16V
16V
16V
16V
PR215
RAMADD3
60
A3
0603
0603
0603
0603
PR216
RAMADD2
27
A2
PR217
RAMADD1
26
A1
PR218
RAMADD0
25
A0
DGND
16
PR219
RAMDQM
DQM0
71
DQM1
28
DQM2
59
DQM3
address
data
address
data
DGND
1
8
56R
RAMDAT5
RP200A
FRAMDAT5
2
7
56R
RAMDAT6
RP200B
FRAMDAT6
3
6
56R
RAMDAT11
RP200C
FRAMDAT11
RAMDAT10
4
5
56R
FRAMDAT10
RP200D
RAMDAT9
1
8
56R
FRAMDAT9
RP201A
RAMDAT8
2
7
56R
FRAMDAT8
RP201B
RAMADD9
3
6
56R
FRAMADD9
RP201C
RAMADD8
RP201D
4
5
56R
FRAMADD8
RAMADD7
RP202A
1
8
56R
FRAMADD7
RAMADD6
RP202B
2
7
56R
FRAMADD6
RAMADD5
RP202C
3
6
56R
FRAMADD5
RAMADD4
RP202D
4
5
56R
FRAMADD4
1
8
56R
RAMADD3
RP203A
FRAMADD3
2
7
56R
RAMDAT31
RP203B
FRAMDAT31
RAMDAT30
3
6
56R
FRAMDAT30
RP203C
RAMDAT29
4
5
56R
FRAMDAT29
RP203D
RAMDAT28
1
8
56R
FRAMDAT28
RP204A
RAMDAT27
2
7
56R
FRAMDAT27
RP204B
RAMDAT26
RP204C
3
6
56R
FRAMDAT26
RAMDAT25
RP204D
4
5
56R
FRAMDAT25
RAMDAT24
RP205A
1
8
56R
FRAMDAT24
RAMDAT7
RP205B
2
7
56R
FRAMDAT7
RAMBA0
RP205C
3
6
56R
FRAMBA0
56R
RAMBA1
RP205D
4
5
FRAMBA1
1
8
56R
RAMADD10
RP206A
FRAMADD10
2
7
56R
RAMADD0
RP206B
FRAMADD0
RAMADD1
3
6
56R
FRAMADD1
RP206C
RAMADD2
4
5
56R
FRAMADD2
RP206D
RAMDAT16
1
8
56R
FRAMDAT16
RP207A
RAMDAT17
RP207B
2
7
56R
FRAMDAT17
RAMDAT18
RP207C
3
6
56R
FRAMDAT18
RAMDAT19
RP207D
4
5
56R
FRAMDAT19
56R
RAMDAT20
RP208A
1
8
FRAMDAT20
56R
RAMDAT21
RP208B
2
7
FRAMDAT21
3
6
56R
RAMDAT22
RP208C
FRAMDAT22
4
5
56R
RAMDAT23
RP208D
FRAMDAT23
R206
RAMADD11
PR252
FRAMADD11
56R
0W125 0805
R207
RAMDAT4
FLASHA19
56R
0W125
0805
R252
PNVMR/B*
PF243
NF(AMD)
+3V3D
56R
R210
0W125
0805
56R
0W125
0805
R208
R222
RAMDAT3
NF(32Mb+)
FRAMDAT3
56R
0R0
0W125
0805
0W125
0805
R253
RAMDAT4
NF(AMD 16Mb)
FLASHA21
56R
0W125
0805
R209
RAMDAT12
NF (Intel 64Mb)
56R
0W125
0805
Use these resistors to configure for
Intel/AMD 8Mbit, 16Mbit, 32Mbit or
64Mbit devices
Intel 32Mbit is used for DV79
C259
C260
C261
C262
1N0
1N0
1N0
1N0
50V
50V
50V
50V
0603
0603
0603
0603
+3V3D
2
RAMDAT0
PR220
DQ0
4
RAMDAT1
PR221
DQ1
5
RAMDAT2
PR222
DQ2
7
RAMDAT3
PR223
DQ3
8
RAMDAT4
PR224
DQ4
10
RAMDAT5
PR225
DQ5
11
RAMDAT6
PR226
DQ6
13
RAMDAT7
PR227
DQ7
74
RAMDAT8
PR228
DQ8
76
RAMDAT9
PR229
DQ9
77
RAMDAT10
PR230
DQ10
79
RAMDAT11
PR231
DQ11
80
RAMDAT12
PR232
+3V3D
DQ12
82
RAMDAT13
PR233
Near ATAPI conn
DQ13
83
RAMDAT14
PR234
DQ14
85
RAMDAT15
PR235
DQ15
31
RAMDAT16
PR236
C203
C264
C251
DQ16
33
RAMDAT17
PR237
DQ17
34
RAMDAT18
PR238
100N
100N
100N
DQ18
36
RAMDAT19
PR239
16V
16V
16V
DQ19
37
RAMDAT20
PR240
0603
0603
0603
DQ20
39
RAMDAT21
PR241
DQ21
40
RAMDAT22
PR242
DGND
DQ22
42
RAMDAT23
PR243
DQ23
DRIVE
45
RAMDAT24
PR244
DQ24
47
RAMDAT25
PR245
DQ25
48
RAMDAT26
PR246
DQ26
50
RAMDAT27
PR247
CON203
DQ27
51
RAMDAT28
PR248
1
XATRESET*
DQ28
53
2
RAMDAT29
PR249
DQ29
54
RAMDAT30
PR250
3
ATDD7
DQ30
56
RAMDAT31
PR251
4
ATDD8
DQ31
5
ATDD6
6
ATDD9
7
ATDD5
8
ATDD10
9
ATDD4
10
ATDD11
11
ATDD3
12
ATDD12
13
ATDD2
14
ATDD13
ATDD0
RP209D
15
ATDD1
ATDD1
RP209C
16
ATDD14
ATDD2
RP209B
17
ATDD0
ATDD3
RP209A
18
ATDD15
ATDD4
RP210D
19
ATDD5
RP210C
20
ATDD6
RP210B
21
ATDMARQ
ATDD7
RP210A
22
ATDD8
RP211A
23
ATDIOW*
ATDD9
RP211B
24
ATDD10
RP211C
25
ATDIOR*
ATDD11
RP211D
26
ATDD12
RP212A
27
ATIORDY
ATDD13
RP212B
28
ATDD14
RP212C
29
ATDMACK*
ATDD15
RP212D
30
ATDMARQ
R238
31
ATINTRQ
ATDIOW*
R241
32
ATDIOR*
R242
33
ATDA1
ATIORDY
R239
34
ATDMACK*
R243
35
ATDA0
ATINTRQ
R240
36
ATDA2
ATDA0
R244
37
ATCS0*
ATDA1
R245
38
ATCS1*
ATDA2
R246
39
ATCS0*
R247
Dubilier
40
ATCS1*
R248
C3
XATRESET*
R249
DGND
+3V3D
PF200
FRAMADD5
25
A0
PF201
FRAMADD6
24
A1
NOTE: Pin B9 is set HIGH to indicate
PF202
FRAMADD7
23
that this version of hardware
A2
PF203
FRAMADD8
22
A3
features the HSYNC delay circuit
PF204
FRAMADD9
21
29
FRAMDAT31
PF216
A4
DQ0
(see sheet 11)
PF205
FRAMADD11
20
31
FRAMDAT29
PF217
A5
DQ1
PF206
FRAMDAT8
19
33
FRAMDAT27
PF218
A6
IC205
DQ2
PF207
FRAMDAT9
18
35
FRAMDAT25
PF219
A7
DQ3
38
FRAMDAT23
PF220
DQ4
FLASH
40
FRAMDAT21
PF221
DQ5
PF208
FRAMDAT5
8
42
FRAMDAT19
PF222
A8
DQ6
PF209
FRAMDAT6
7
44
FRAMDAT17
PF223
A9
DQ7
6
PF210
FRAMDAT7
A10
5
PF211
FRAMBA0
A11
4
30
PF212
FRAMBA1
FRAMDAT30
PF224
A12
DQ8
3
32
PF213
FRAMADD10
FRAMDAT28
PF225
A13
DQ9
PF214
FRAMADD0
2
34
FRAMDAT26
PF226
A14
DQ10
PF215
FRAMADD1
1
36
FRAMDAT24
PF227
A15
DQ11
39
FRAMDAT22
PF239
DQ12
41
FRAMDAT20
PF240
DQ13
PF228
FRAMADD2
48
43
FRAMDAT18
PF241
A16
DQ14
PF229
FRAMDAT10
17
45
FRAMDAT16
PF242
A17
DQ15
PF230
FRAMDAT11
16
A18
PF231
FLASHA19
15
A19
PF232
FRAMDAT3
10
A20
PF233
FLASHA21
9
A21
PWR_ON_RESET*
12
RP
11
PF234
FRAMADD4
WE
14
PF235
WP
26
PF236
PNVMCE*
CE
28
PF237
FRAMADD3
OE
+3V3D
PF238
13
VPP
C253
C252
TE28F160
NF
L967SW
100UF
100UF
TSOP-48
10V
10V
YXF
YXF
DGND
DGND
+1V8D
+3V3D
+3V3D
FLASH DECOUPLING
C220
C209
C211
C216
C263
C254
C221
100N
16V
100N
100N
100N
1N0
100UF
100N
0603
16V
16V
16V
50V
10V
16V
YXF
0603
0603
0603
0603
0603
DGND
DGND
On bottom of board
DGND
To enable Vaddis PLL for testing:
Make PLLCFGA low
Isolate AMCLK from GCLKA
Link GCLKA to GCLKP
Connect AMCLK_OUT to AMCLK
AMCLK is now an output and the Vaddis PLL is
enabled
RESET
+3V3D
IC201
C207
PWR_ON_RESET*
P239
RST
100N
16V
0603
LM809M3-2.63
SOT-23
DGND
+3V3D
+3V3D
CONFIGURATION LINKS
DV75
R203
4K7
0805
P205
6CH*
N3
NVMDA0
P4
NVMDA1
P3
NVMDA2
DV79/DV29
R3
NVMDA3
R211
R4
NVMDA4
4K7
P1
NVMDA5
0805
P2
NVMDA6
N4
NVMDA7
N1
NVMR/B
DGND
L4
NVMCE
M3
NVMR/B1
L3
NVMCE1
M1
NVMRE
N2
NVMWP
M2
NVMWE
DGND
L1
NVMALE
L2
NVMCLE
M4
NVMCD
PCLK
R202
22R 0603
U12
PCLK
RAMCKE
V11
RAMCKE
RAMWE*
Y14
RAMWE
RAMCAS*
W13
RAMCAS
RAMRAS*
Y13
RAMRAS
RAMCS*
Y12
RAMCS
RAMDQM
W14
RAMDQM
IC202
RAMBA1
Y11
RAMBA1
W11
RAMBA0
RAMBA0
U10
RAMADD11
RAMADD11
W9
RAMADD10
RAMADD10
V10
RAMADD9
RAMADD9
RAMADD8
U9
RAMADD8
RAMADD7
V9
RAMADD7
RAMADD6
U8
ZORAN VADDIS V
RAMADD6
RAMADD5
V8
RAMADD5
RAMADD4
W7
RAMADD4
RAMADD3
Y7
RAMADD3
RAMADD2
Y8
RAMADD2
RAMADD1
W8
RAMADD1
RAMADD0
Y9
RAMADD0
RAMDAT0
W18
RAMDAT0
RAMDAT1
Y18
RAMDAT1
RAMDAT2
W17
RAMDAT2
RAMDAT3
Y17
RAMDAT3
W16
RAMDAT4
RAMDAT4
Y16
RAMDAT5
HS202
RAMDAT5
W15
RAMDAT6
RAMDAT6
Y15
RAMDAT7
RAMDAT7
RAMDAT8
V14
RAMDAT8
RAMDAT9
U14
RAMDAT9
RAMDAT10
V15
RAMDAT10
RAMDAT11
V16
RAMDAT11
RAMDAT12
V17
RAMDAT12
RAMDAT13
U17
RAMDAT13
RAMDAT14
V18
RAMDAT14
RAMDAT15
U18
RAMDAT15
RAMDAT16
W6
RAMDAT16
RAMDAT17
Y6
RAMDAT17
RAMDAT18
W5
3319B+T410-01
RAMDAT18
RAMDAT19
Y5
20.9C/W
RAMDAT19
RAMDAT20
W4
RAMDAT20
Y4
RAMDAT21
RAMDAT21
Y3
RAMDAT22
RAMDAT22
Y2
RAMDAT23
RAMDAT23
RAMDAT24
W2
RAMDAT24
+5VD
W3
RAMDAT25
RAMDAT25
RAMDAT26
V4
RAMDAT26
RAMDAT27
U4
RAMDAT27
R226
R227
R228
RAMDAT28
V5
RAMDAT28
RAMDAT29
V6
RAMDAT29
1K0
1K0
1K0
RAMDAT30
U6
RAMDAT30
0W125
0W125
0W125
RAMDAT31
V7
RAMDAT31
0805
0805
0805
PNVMCE*
Y1
PNVMCE
PNVMR/B*
W1
PNVMR/B
33R
P243
4
5
D2
ATDD0
3
6
33R
P244
C2
ATDD1
2
7
33R
P245
A1
ATDD2
1
8
33R
P246
B2
ATDD3
4
5
33R
P247
D3
ATDD4
3
6
33R
P248
C3
ATDD5
2
7
33R
P249
D4
ATDD6
1
8
33R
P250
C4
ATDD7
1
8
33R
P251
A4
ATDD8
2
7
33R
P252
B4
ATDD9
3
6
33R
P253
A3
ATDD10
4
5
33R
P254
B3
ATDD11
P255
1
8
33R
A2
ATDD12
P256
2
7
33R
E4
ATDD13
P257
3
6
33R
E3
ATDD14
P258
4
5
33R
F4
ATDD15
P259
82R 0805
B1
ATDMARQ
P260
22R 0805
C1
ATIOW
P261
D1
22R 0805
ATIOR
P262
F3
82R 0805
ATIORDY
P263
E2
22R 0805
ATDMACK
82R 0805
P264
E1
ATINTRQ
33R 0805
P265
G3
ATDA0
33R 0805
P266
F1
ATDA1
33R 0805
P267
F2
ATDA2
33R 0805
P268
G1
ATCS0
33R 0805
P269
G2
ATCS1
33R 0805
ATRESET*
P270
B7
HD0
DDC_SDA
A7
DDC_SDA
HD1
R250
B8
HD2
RESET*
A8
RESET*
HD3
5K6
+3V3D
B9
HD4
0W125
A9
HD5
0805
B10
HD6
DGND
A10
HDMI_RESET*
HDMI_RESET*
HD7
B5
CEC
CEC
HA0
A5
DDC_SCL
DDC_SCL
HA1
B6
MUTE_RGB
MUTE_RGB
HA2
PROG/INT*
A6
PROG/INT*
HA3
C6
HWR
D6
HRD
D7
HCS
C7
HIRQ
C5
HACK
D8
HCS1
C8
HIRQ1
D5
HACK1
DGND
C14
XO
CLK27M_VADDIS
A14
CLK27M_VADDIS
GCLKP
B15
R219
GCLKA
B14
PWR_ON_RESET*
RESET
CLOCKS
0R0
0W125
0805
NF
Audio master clock (input)
P275
Can be configured as an output for testing
R224
MCLK_VADDIS
MCLK_VADDIS
0R0
P274
R223
0W125
AMCLK_OUT
0805
0R0
0W125
DGND
0805
NF
C223
C225
C227
C229
C231
C232
C233
C234
C235
C236
C237
C238
100N
100N
100N
100N
100N
100N
100N
100N
100N
100N
100N
100N
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
0603
0603
0603
0603
0603
0603
0603
0603
0603
0603
0603
0603
C222
C224
C226
C228
C230
C201
C202
100N
100N
100N
100N
100N
100N
100N
16V
16V
16V
16V
16V
16V
16V
0603
0603
0603
0603
0603
0603
0603
VADDIS DECOUPLING
L200
P271
VDDP_A
L201
P273
VDD_PLL
C208
C210
C248
C250
+1V8D
+3V3D
100N
100N
10UF
10UF
16V
16V
50V
0603
50V
0603
+3V3D
YK
YK
DGND
DGND
E17
DAC_A_B/U
F17
DAC_B_R/V
F18
DAC_C_G/Y
G17
DAC_D_CVBS
G18
DAC_E_Y
H17
DAC_F_C
K17
COSYNC
D16
RSET
D17
VREF
K19
1
8
100R
PV200
RP216A
VIDP_0
K20
2
7
100R
PV201
RP216B
VIDP_1
L19
3
6
100R
PV202
RP216C
VIDP_2
L20
4
5
100R
PV203
RP216D
VIDP_3
L18
1
8
100R
PV204
RP217A
VIDP_4
M19
2
7
100R
PV205
RP217B
VIDP_5
M20
3
6
100R
PV206
RP217C
VIDP_6
M18
4
5
100R
PV207
RP217D
VIDP_7
M17
RP218A
1
8
100R
VIDP_8
PV208
N20
RP218B
2
7
100R
VIDP_9
PV209
N19
RP218C
3
6
100R
VIDP_10
PV210
N18
RP218D
4
5
100R
VIDP_11
PV211
N17
RP219A
1
8
100R
VIDP_12
PV212
P20
RP219B
2
7
100R
VIDP_13
PV213
P19
PV214
RP219C
3
6
100R
VIDP_14
P18
PV215
RP219D
4
5
100R
VIDP_15
100R
P17
PV216
RP220A
1
8
VIDP_16
R20
2
7
100R
PV217
RP220B
VIDP_17
R19
3
6
100R
PV218
RP220C
VIDP_18
R18
4
5
100R
PV219
RP220D
VIDP_19
T19
VCLK
K18
R200
33R
PV220
VCLKx2
R17
R201
100R
PV221
VSYNC
T20
R205
100R
PV222
HSYNC
DIGITAL AUDIO
E19
DGND
AMCLK
E20
RP213A
1
8
56R
ALRCLKI
P287
F20
ABCLKI
F19
RP213B
2
7
56R
ALRCLKO
P288
G19
P289
ABCLKO
C17
RP213C
3
6
56R
AIN0
C16
AIN1
J17
4
5
56R
P290
RP213D
AOUT0
J19
3
6
100R
P284
RP214C
AOUT1
H20
1
8
100R
P285
RP214A
AOUT2
H19
AOUT3
G20
AOUT4
J20
2
7
100R
P286
RP214B
SPDIF
G4
FPDOUT
FPCDOUT
H4
FPDIN
FPCDIN
P291
H3
FPCLK
FPCCLK
P292
H1
FPSEL
FPCSTB
P293
H2
IRRCV
IRRCV
W19
MODRI
U20
MODDCD
V20
MODDSR
V19
MODCTS
U19
MODDTR
Y20
MODRTS
Y19
DGND
EEPROM MEMORY
MODRD
W20
MODTD
SERIAL PORT
T3
DUPRD
SERIAL_RX
U3
DUPTD
SERIAL_TX
DGND
B13
SPIDATI
C13
SPIDATO
D13
DGND
SPICLK
B17
SDA
I2CDAT
A17
SCL
I2CCLK
C9
PWM
C15
SERADC0
B16
DGND
SERADC1
D15
+3V3D
SERADC2
R237
RP215A
RP215B
4K7
4K7
4K7
0W125
62mW
62mW
0805
1206
1206
K3
EJTRST
EJTRST
K4
EJTDI
EJTDI
K2
EJTDO
EJTDO
K1
EJTMS
EJTMS
J1
EJTCK
EJTCK
J4
PSUFS0
GPCIO6
PSUFS0
B18
PSUFS1
GPCIO7
PSUFS1
C18
ENABLE_AV
GPCIO8
ENABLE_AV
V1
16/9
GPCIO9
16/9
V2
9190INT*
GPCIO10
9190INT*
U2
FSEL1
GPCIO11
FSEL1
U1
GAIN_SCALING
GPCIO12
GAIN_SCALING
T1
ML_8740_2
GPCIO13
ML_8740_2
T2
MUTE*
GPCIO14
MUTE*
R1
ML_8740_1
GPCIO15
ML_8740_1
R2
ML_8740_0
GPCIO16
ML_8740_0
B11
MC
GPCIO17
MC
C11
MD
GPCIO18
MD
C12
ATRESET*
GPCIO19
V3
FSEL0
GPCIO20
FSEL0
B12
GPAIO0
DGND
ATE can use test pad to put in debug boot mode
+3V3D
Fit Link to boot from DEBUG UART
R235
R236
R230
4K7
4K7
0W125
0W125
1K0
0805
0805
0W125
C10
0805
BOOTSEL0
D10
P279
BOOTSEL1
P278
D11
BOOTSEL2
CON200
D14
1
TESTMODE
2
P276
D9
PLLSEL
J2
HARWIN
PLLCFGP
J3
P277
M20-973
PLLCFGA
R220
R221
R229
0R0
0R0
0W125
0W125
1K0
0805
0805
0W125
NF
NF
0805
ZR36750
BGA-316
DGND
Design note: Some Vaddis GPIO
initialise as o/p high, some as o/p
low.
MUTE must use one that initialises
as o/p low. Currently on pin T2
+3V3D
Decoupling caps on bottom of board
C239
C240
C249
C241
C243
100N
100N
100N
1N0
1N0
16V
16V
16V
50V
50V
0603
0603
0603
0603
0603
DGND
+1V8D
Decoupling caps on bottom of board
C242
C244
C245
1N0
1N0
1N0
50V
50V
50V
0603
0603
0603
DGND
DRAWING TITLE
DRAWING TITLE
DV79 MAIN VADDIS V
DV79 MAIN VADDIS V
Filename:
Filename:
L974C2.sch
L974C2.sch
Notes:
Notes:
A & R Cambridge Ltd.
A & R Cambridge Ltd.
Pembroke Avenue
Pembroke Avenue
Waterbeach
Waterbeach
Cambridge CB5 9QR
Contact Engineer:
Contact Engineer:
Peter Gaggs
Peter Gaggs
Contact Tel:
Contact Tel:
+3V3D
120R@100MHz
+1V8D
120R@100MHz
VIDP[0..19]
VIDP[0..19]
+3V3D
C204
C206
100N
100N
VIDP0
PV223
16V
16V
VIDP1
PV224
0603
0603
VIDP2
PV225
VIDP3
PV226
VIDP4
DGND
PV227
VIDP5
PV228
VIDP6
PV229
VIDP7
PV230
VIDP8
PV231
VIDP9
FRONT PANEL
PV232
VIDP10
PV233
VIDP11
FPDOUT
PV234
P200
VIDP12
PV235
VIDP13
C200
PV239
VIDP14
PV240
VIDP15
PV241
47P
100V
VIDP16
PV242
0805
VIDP17
PV243
DGND
VIDP18
PV244
IC200A 74HCT125D
VIDP19
PV245
SO-14
R218
2
3
P294
P202
XFPDIN
100R
PV236
CLK_27M_VID
0W125 0805
PV237
VSYNC*
PV238
HSYNC*
DGND
AMCLK_OUT
IC200B 74HCT125D
SO-14
R254
P295
ALRCLK
5
6
XFPCLK
ALRCLK
P203
100R
ABCLK
ABCLK
0W125 0805
ADAT0
ADAT0
DGND
ADAT1
ADAT1
ADAT2
ADAT2
IC200C 74HCT125D
SPDIF
SO-14
SPDIF
R255
9
8
P296
XFPSEL
P204
100R
0W125 0805
DGND
+5VD
R234
4K7
0W125
0805
IRRCV
IRRCV
IC204A
7
+3V3D
C205
WP
1
A0
6
2
47P
SCL
A1
P242
5
3
R232
R233
100V
SDA
A2
4K7
4K7
0805
24LC08BT/SN
DGND
0W125
0W125
DGND
SO-8
0805
0805
P201
SDA
P282
SCL
+3V3D
R204
CON201
10K
16
EJTAG DEBUG
RP215C
RP215D
0W125
15
4K7
4K7
0805
14
62mW
62mW
13
1206
1206
12
11
10
9
8
PJ203
7
6
5
4
3
PJ205
Not Fitted
2
R251
PJ200
1
33R
0W125
HARWIN
0805
DGND
M20-972
NOTE: JTAG port is for software debug only.
Boundary scan is not supported
R231
1K0
0W125
0805
BOOT SELECT
TR200
MMUN2211LT1
IC204B
IC200E
SOT-23
24LC08BT/SN
+3V3D
74HCT125D
+5VD
SO-8
SO-14
8
14
VCC
VCC
C218
C219
100N
100N
4
16V
7
16V
GND
GND
0603
0603
DGND
DGND
IC200D
74HCT125D
SO-14
12
11
DGND
C246
C247
1N0
1N0
50V
50V
0603
0603
C255
1N0
50V
0603
04_E142
PG
23-09-04
Correct BOM error - R320 now fitted
1.1
04_E129
PG
24-08-04
Production release
1.0
ECO No.
ECO No.
INITIALS
INITIALS
DATE
DATE
DESCRIPTION OF CHANGE
DESCRIPTION OF CHANGE
ISSUE
ISSUE
Sheet
Sheet
2
2
of
of
11
11
A1
DRAWING NO.
L974C2
(01223) 203270
(01223) 203270
Printed:
Printed:
23-Sep-2004
23-Sep-2004
Advertisement
