Dell Broadcom NetXtreme Family of Adapters User Manual page 191

User Diagnostics: Broadcom NetXtreme II Network Adapter User Guide
A3 Interrupt
A5 MSI
A6 Memory BIST Invokes the internal chip Built-In Self Test (BIST) command to test internal memory.
Group B: Memory Tests
TXP
B1
Scratchpad
TPAT
B2
Scratchpad
RXP
B3
Scratchpad
COM
B4
Scratchpad
CP
B5
Scratchpad
MCP
B6
Scratchpad
TAS Header
B7
Buffer
TAS Payload
B8
Buffer
RBUF via
B9
GRC
RBUF via
B10 Indirect
Access
RBUF Cluster
B11
List
B12 TSCH List
B13 CSCH List
RV2P
B14
Scratchpads
TBDC
B15
Memory
RBDC
B16
Memory
CTX Page
B17
Table
B18 CTX Memory
Group C: Block Tests
CPU Logic
C1 and DMA
Interface
RBUF
C2
Allocation
C3 CAM Access
C4 TPAT Cracker
C5 FIO Register The Fast IO (FIO) verifies the register interface that is exposed to the internal CPUs.
file:///T|/htdocs/NETWORK/BroadCom/71921/NetXtremeII/en/userdiag.htm[9/26/2012 3:29:54 PM]
Generates a PCI interrupt and verifies that the system receives the interrupt and invokes the correct
ISR. A negative test is also performed to verify that a masked interrupt does not invoke the ISR.
Verifies that a Message Signaled Interrupt (MSI) causes an MSI message to be DMA'd to host
memory. A negative test is also performed to verify that when an MSI is masked, it does not write
an MSI message to host memory.
The Group B tests verify all memory blocks of the Broadcom NetXtreme II adapter by writing
various data patterns (0x55aa55aa, 0xaa55aa55, walking zeroes, walking ones, address, etc.) to
each memory location, reading back the data, and then comparing it to the value written. The fixed
data patterns are used to ensure that no memory bit is stuck high or low, while the walking
zeroes/ones and address tests are used to ensure that memory writes do not corrupt adjacent
memory locations.
Verifies the basic logic functionality of all the on-chip CPUs. It also exercises the DMA interface
exposed to those CPUs. The internal CPU tries to initiate DMA activities (both read and write) to
system memory and then compares the values to confirm that the DMA operation completed
successfully.
Verifies the RX buffer (RBUF) allocation interface by allocating and releasing buffers and checking
that the RBUF block maintains an accurate count of the allocated and free buffers.
Verifies the content-addressable memory (CAM) block by performing read, write, add, modify, and
cache hit tests on the CAM associative memory.
Verifies the packet cracking logic block (i.e., the ability to parse TCP, IP, and UDP headers within an
Ethernet frame) as well as the checksum/CRC offload logic. In this test, packets are submitted to
the chip as if they were received over Ethernet and the TPAT block cracks the frame (identifying the
TCP, IP, and UDP header data structures) and calculates the checksum/CRC. The TPAT block results
are compared with the values expected by Broadcom NetXtreme II User Diagnostics and any errors
are displayed.