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Pin No.
Pin Name
K1
VSS
K2
PLLHV
K3
TMS
K4
TRST#
K5
CVDD
K6 to K11
VSS
K12
CVDD
UHPI_HD[0],
K13, K14
UHPI_HD[1]
K15
EM_A[2]
K16
VSS
L1
TDI
UHPI_HD[30] to
L2 to L4
UHPI_HD[28]
L5 to L12
VSS
UHPI_HD[3],
L13, L14
UHPI_HD[4]
L15, L16
EM_A[4], EM_A[3]
M1
EMU[0]#
M2
TDO
M3
UHPI_HD[27]
M4
DVDD
M5
VSS
M6 to M11
CVDD
M12
VSS
M13
DVDD
M14
UHPI_HD[2]
M15, M16
EM_A[6], EM_A[5]
N1
EMU[1]#
UHPI_HD[25],
N2, N3
UHPI_HD[26]
N4
EM_D[22]
N5
DVDD
EM_D[18], EM_D[16],
N6 to N11
EM_D[30], EM_D[29],
EM_D[27], EM_D[25]
N12
DVDD
UHPI_HD[5],
N13, N14
UHPI_HD[6]
N15, N16
EM_A[8], EM_A[7]
P1
TCK
P2
UHPI_HD[24]
EM_D[21] to EM_D[19],
P3 to P7
EM_D[17], EM_D[31]
P8
DVDD
EM_D[28], EM_D[26],
P9 to P11
EM_D[24]
P12
EM_A[12]
P13
EM_DQM[2]
P14
UHPI_HD[7]
P15
EM_A[11]
P16
EM_A[9]
R1
DVDD
R2
EM_D[23]
R3
EM_CAS#
R4
EM_DQM[0]
I/O
-
Ground terminal
-
Power supply terminal (+3.3V) (for PLL)
I
Test mode selection signal input terminal (for JTAG)
I
Test reset signal input terminal (for JTAG)
-
Power supply terminal (+1.26V) (for core)
-
Ground terminal
-
Power supply terminal (+1.26V) (for core)
I/O
Not used
O
Address signal output to the SD-RAM
-
Ground terminal
I
Test data input terminal (for JTAG)
I/O
Not used
-
Ground terminal
I/O
Not used
O
Address signal output to the SD-RAM
I/O
Emulation terminal
O
Test data output terminal (for JTAG)
I/O
Not used
-
Power supply terminal (+3.3V) (for IO)
-
Ground terminal
-
Power supply terminal (+1.26V) (for core)
-
Ground terminal
-
Power supply terminal (+3.3V) (for IO)
I/O
Not used
O
Address signal output to the SD-RAM
I/O
Emulation terminal
I/O
Not used
I/O
Two-way data bus with the SD-RAM
-
Power supply terminal (+3.3V) (for IO)
I/O
Two-way data bus with the SD-RAM
-
Power supply terminal (+3.3V) (for IO)
I/O
Not used
O
Address signal output to the SD-RAM
I
Test clock signal input terminal (for JTAG)
I/O
Not used
I/O
Two-way data bus with the SD-RAM
-
Power supply terminal (+3.3V) (for IO)
I/O
Two-way data bus with the SD-RAM
O
Address signal output terminal
O
Byte enable signal output to the SD-RAM
I/O
Not used
O
Address signal output terminal
O
Address signal output to the SD-RAM
-
Power supply terminal (+3.3V) (for IO)
I/O
Two-way data bus with the SD-RAM
O
Column address strobe signal output to the SD-RAM
O
Byte enable signal output to the SD-RAM
STR-DA2400ES/DG920
Description
Not used
Not used
99

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Str-da2400esStr-dg920

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