Operating Principles
VIDEO CONTROLLER OPERATION
2.2
The video controller section generates the video signals for the received data. The video controller
section is separate in the C125 MAIN board and the control panel. The control panel is comected
to the engine controller board (PWB-A), but is controlled by the C125 MAIN board, which sends
the signals for the control panel through the engine controller board.
2.2.1 C125 MAIN Board Operation
Figure 2-36 shows a block diagram of the C125 MAIN board. The C125 MAIN board contains the
video controller, which consists of a MB86930 (SPARKlite, 17.6 MHz, 32-bit bus) RISC CPU, the
standard cells developed for this printer, DRAM, ROM, and a 16K-bit EEPROM.
ROM 16M
CPU
(lCl)
DRAMs
(IC 16,17,
19, 20) and
(cNE, 9)
Figure 2-36. C125 MAIN Board Block Diagram
2-16
Video Controller Section
,-------- ---------- . . . . . . . . . . . . . . . . . . . . . . . . .
,
,
,
.
,
,
Engine
Controller
Figure 2-35.
Video Controller Section
ROM 16M
(ICE)
T
T
ADDRESS
Video l/F ;grallel
4
4----
*
,
,
.
,
Control
Panel
, ,
,
,
,
Font
ROME
Cartridge
ADDRESS
DATA
CONTROL
ADM232
B
Rev. A