System Configuration; Cpu Block Diagram - Nintendo 1504166 - Game Boy Advance SP Edition Console Programming Manual

AGB Programming Manual

2 System Configuration

2.1 CPU Block Diagram

ARM7TDMI
CPU
(16.78MHz)
INT
Control
ROM
(16KByte)
WRAM
(32KByte)
EXT. WRAM
(256KByte)
DMAC
(4ch)
Timer
(4ch)
SIO
SOUND(CGB
compatible + PWM)
KEY
Control
* "R:8/16/32" and "W:8/16/32" mean that you can
access an area of 8bits/16bits/32bits when reading
and writing, respectively.
©1999 - 2001 Nintendo of America Inc.
Game Pak
Game Pak I/F
(Prefetch Buffer)
32
16
R:16/32
32
W:16/32
R:8/16/32
W:8/16/32
32
R:8/16/32
32
R:8/16/32
W:8/16/32
32
16(2 Wait)
R:16/32
W:16/32
R:8/16/32
W:8/16/32
32
R:8/16/32
W:8/16/32 32
R:16/32
32
W:16/32
R:8/16/32
W:8/16/32
32 16
R:8/16/32 R:16/32
W:8/16/32 W:16/32
32
32
R:8/16/32
32
W:8/16/32
15
VRAM_A
(64KByte)
BG Processing Circuit
VRAM_B VRAM_C
(16KByte) (16KByte)
OBJ Processing Circuit
OAM
(64bit x 128)
Priority Evaluation Circuit
Palette RAM
(16bit x 512)
Special Color Processing Circuit
RGB(5:5:5)
LCD Unit
System Configuration
CPU
Bitmap
Mode
D.C.N. AGB-06-0001-002B4