Signal And Power-Up Requirements; Power-Up Requirements; Signal Sequence And Timing Description; Figure 13. Signal Relationship Requirements During Power-Up - AMD Athlon XP 10 Datasheet

26237C—May 2003
9

Signal and Power-Up Requirements

9.1

Power-Up Requirements

Signal Sequence and
Timing Description
3.3 V Supply
VCCA (2.5 V)
(for PLL)
V
CC_CORE
RESET#
NB_RESET#
PWROK
FID[3:0]
System Clock
Figure 13. Signal Relationship Requirements During Power-Up Sequence
Notes: 1. Figure 13 represents several signals generically by using names not necessarily consistent
with any pin lists or schematics.
2. Requirements 1–8 in Figure 13 are described in "Power-Up Timing Requirements" on page 44.
Chapter 9
Preliminary Information
The AMD Athlon™ XP processor model 10 is designed to
provide functional operation if the voltage and temperature
parameters are within the limits of normal operating ranges.
Figure 13 shows the relationship between key signals in the
system during a power-up sequence. This figure details the
requirements of the processor.
2
1
6
5
7
3
Signal and Power-Up Requirements
AMD Athlon™ XP Processor Model 10 Data Sheet
4
8
Warm reset
condition
43