Sharp FO-2970M Service Manual page 39

SH7041 (IC5) Terminal descriptions
Classification Code Terminal No.
Power Vcc
99,112,135
Vss
87,93,117,
Vpp
Clock PLL Vcc
PLL Vss
PLLCAP
EXTAL
XTAL
CK
System control RES
MRES
WDTOVF
BREQ
BACK
Operation MD0~
mode control MD3
Interrupt NMI
IRQ0 ~
IRQ7
IRQOUT
Address bus A0~A21
15~24,25,
I/O
12,26,40, I Power
63,77,85,
6,14,28, I Ground
35,42,55,
61,71,79,
129,141
I Program power source
104 I PLL power
106 I PLL ground
105 I PLL capacity
96 I External clock
94 I Crystal
107 O System clock
108 I Power-on-reset
144 I Manual reset
44 O Watch dog timer
overflow
33,38 I Bus right demand
30,37 O Bus right demand
acknowledge
95,97 I Mode setting
102,103
98 I Non-maskable
interrupt
31,32,34 I Interruption demand
37~39 0 to 7
41,51,52
64~69
70,72
132,136
5,46 O Interruption demand
output
7~11,13, O Address bus
27,29,30,
37~39,41
Name
Connect Vcc terminals with the power source for all systems.
If any open terminal remained, operation is impossible.
Connect to the ground.
Connect Vss terminals with the ground for all systems.
If any open terminal remained, operation is impossible.
Connected with the power source (Vcc) for normal operation.
In case of PROM mode, apply 12.5 V.
Power source for the built-in PLL oscillator.
Ground for the built-in PLL oscillator.
External capacity terminal for the built-in PLL oscillator.
Connected with the crystal oscillator. By EXTAL terminal the external
clock can be input.
Connected with the crystal oscillator.
Supplied to peripheral devices.
When impressing low level onto this terminal, power-on-reset
condition is attained.
When applying low level to this terminal, manual reset condition
is obtained.
Overflow output signal from WDT.
Low level obtained when external device demands to release
the bus right.
Shows that the bus right has been released to the external device.
The device outputting signal BREQ can acknowledge the pass
right gained by receiving signal BACK.
The terminal to determine operation modes.
Do not change the input value during operation.
Non-maskable interruption demand terminal. Receiving on either
leading edge or trailing edge can be selected.
Maskable interruption demand terminal. Level input and edge
input can be selected.
Shows that the interrupt factor has occurred.
During bus release, interrupt occurred can be known.
Outputs address.
5 – 3
FO-2970MU
Function
(Continuing)