v The server supports memory mirroring (mirroring mode):
Figure 1. Memory channel interface layout
54
IBM System x3550 M2 Types 4198 and 7946: Installation and User's Guide
Table 10. Non-mirroring (normal) mode DIMM installation sequence
Installed microprocessors
Microprocessor socket 1
Microprocessor socket 2
– Memory-mirroring mode replicates and stores data on two pairs of DIMMs
within two channels simultaneously. If a failure occurs, the memory controller
switches from the primary pair of memory DIMMs to the backup pair of
DIMMs. To enable memory mirroring through the Setup utility, select System
Settings → Memory. For more information, see "Using the Setup utility" on
page 90. When you use the memory mirroring feature, consider the following
information:
- When you use memory mirroring, you must install a pair of DIMMs at a
time. One DIMM must be in channel 0, and the mirroring DIMM must be in
the same slot in channel 1. The two DIMMs in each pair must be identical
in size, type, and rank (single or dual) , and organization, but not in speed.
The channels run at the speed of the slowest DIMM in any of the channels.
- Channel 2, DIMM connectors 8 ,7, 15, and 16 are not used in
memory-mirroring mode.
- The maximum available memory is reduced to half of the installed memory
when memory mirroring is enabled. For example, if you install 64 GB of
memory, only 32 GB of addressable memory is available when you use
memory mirroring.
The following diagram shows the memory channel interface layout with the DIMM
installation sequence for mirroring mode. The numbers within the boxes indicate
the DIMM population sequence in pairs within the channels, and the numbers
next to the boxes indicate the DIMM connectors within the channels. For
example, the following illustration shows the first pair of DIMMs (indicated by
ones (1) inside the boxes) should be installed in DIMM connectors 3 on channel
0 and DIMM connector 6 on channel 1. DIMM connectors 7, 8, 15, and 16 on
channel 2 are not used in memory-mirroring mode.
The following table lists the DIMM connectors on each memory channel.
Table 11. Connectors on each memory channel
Memory channel
Channel 0
DIMM connector population sequence
3, 6, 8, 2, 5, 7, 1, 4
11, 14, 16, 10, 13, 15, 9, 12
DIMM connectors
1, 2, 3, 9, 10, 11