Epson S1C17589 Manual

S1C17589
■ DESCRIPTIONS
The S1C17589 is a 16-bit embedded Flash MCU that features wide operating voltage range from 1.8 V to 5.5 V. It in-
cludes a lot of general-purpose I/O ports and A/D converter input ports and is suitable for various kinds of sensing ap-
plications from battery-driven equipment to home electrical products.
■ FEATURES
Model
CPU
CPU core
Other
Embedded Flash memory
Capacity
Erase/program count
Other
Embedded RAM
Capacity
Clock generator (CLG)
System clock source
System clock frequency
(operating frequency)
IOSC oscillator circuit
OSC1 oscillator circuit
OSC3 oscillator circuit
EXOSC clock input
Other
I/O port (PPORT)
Number of general-purpose
I/O ports
Number of input interrupt ports 83 bits (max.) (Chip, QFP15-100pin)
Number of ports that support
universal port multiplexer
(UPMUX)
Timers
Watchdog timer (WDT)
Real-time clock (RTCA)
16-bit timer (T16)
16-bit PWM timer (T16B)
(rev1.0)
16-bit Single Chip Microcontroller
● Wide operating voltage range from 1.8 V to 5.5 V.
● A maximum of 88 general-purpose I/O ports are available.
● Equipped with a two-channel 10-bit A/D converter with eight inputs/channel.
● Allows up to 24 (four channels × six ports) PWM outputs.
Seiko Epson original 16-bit RISC CPU core S1C17
On-chip debugger
128K bytes (for both instructions and data)
50 times (min.) * Programming by the debugging tool ICDmini
Security function to protect from reading/programming by ICDmini
On-board programming function using ICDmini
16K bytes
4 sources (IOSC/OSC1/OSC3/EXOSC)
16.8 MHz (max.)
16/12/8 (boot clock source)/4 MHz (typ.) selectable via software
10 µs (max.) starting time
(time from cancelation of SLEEP state to vector table read by the CPU)
32.768 kHz (typ.) crystal oscillator
Oscillation stop detection circuit included
16.8 MHz (max.) crystal/ceramic oscillator
16.8 MHz (max.) square or sine wave input
Configurable system clock division ratio
Configurable system clock used at wake up from SLEEP state
Operating clock frequency for the CPU and all peripheral circuits is selectable.
Input/output port: 87 bits (max.) (Chip, QFP15-100pin)
67 bits (max.) (QFP14-80pin)
51 bits (max.) (QFP13-64pin)
Output port: 1 bit (max.)
Pins are shared with the peripheral I/O.
63 bits (max.) (QFP14-80pin)
47 bits (max.) (QFP13-64pin)
32 bits (Chip, QFP15-100pin, QFP14-80pin)
31 bits (QFP13-64pin)
A peripheral circuit I/O function selected via software can be assigned to each port.
Generates NMI or watchdog timer reset.
128–1 Hz counter, second/minute/hour/day/day of the week/month/year counters
Theoretical regulation function for 1-second correction
Alarm and stopwatch functions
6 channels
Generates the SPIA master clocks and the ADC10A trigger signals.
4 channels
Event counter/capture function
PWM waveform generation function
Number of PWM output or capture input ports: 6 ports/channel
S1C17589