Acromag PMC521 Series User Manual

Octal eia/tia-422b communication module
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Series PMC521
Octal EIA/TIA-422B Communication Module
USER'S MANUAL
ACROMAG INCORPORATED
Tel: (248) 295-0310
30765 South Wixom Road
Fax: (248) 624-9234
Wixom, MI 48393-2417 U.S.A.
Copyright 2007, Acromag, Inc., Printed in the USA.
Data and specifications are subject to change without notice.
8500756E

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  • Page 1 Octal EIA/TIA-422B Communication Module USER’S MANUAL ACROMAG INCORPORATED Tel: (248) 295-0310 30765 South Wixom Road Fax: (248) 624-9234 Wixom, MI 48393-2417 U.S.A. Copyright 2007, Acromag, Inc., Printed in the USA. Data and specifications are subject to change without notice. 8500756E...
  • Page 2: Table Of Contents

    This is very important where property loss or human life is involved. It is important that you perform satisfactory overall system design and it is agreed between you and Acromag, that this is your responsibility. 1.0 General Information The information of this manual KEY 521 FEATURES ..........
  • Page 3 4501-919 CABLE 5028-432 (SHIELDED) ....4501-920 TERMINATION PANEL 5025-288 ..... Trademarks are the property of their respective owners. RELATED PUBLICATIONS The following datasheet provides additional information for in depth understanding of the PMC521. XR17D158 Datasheet http://www.exar.com _________________________________________________________________________________________ Acromag, Inc. Tel:248-295-0310 Fax:248-624-9234 Email:solutions@acromag.com http://www.acromag.com...
  • Page 4: General Information

    Baud rates up to 3.000Mbps are available with a user-specified crystal.  Interrupt Support - Individually controlled transmit empty, receive ready, line status, data set, & flow control interrupts may be generated. _________________________________________________________________________________________ Acromag, Inc. Tel:248-295-0310 Fax:248-624-9234 Email:solutions@acromag.com http://www.acromag.com...
  • Page 5: Pci Interface Features

    Termination Panel: Model 5025-288: DIN-rail mountable panel provides 68 screw terminals for universal field I/O termination. Connects to Acromag board, via SCSI-3 to twisted pair cable described above. _________________________________________________________________________________________ Acromag, Inc. Tel:248-295-0310 Fax:248-624-9234 Email:solutions@acromag.com http://www.acromag.com...
  • Page 6: Board Dll Control Software

    Acromag PMC I/O board products, PCI I/O Cards, and CompactPCI I/O Cards. The software is implemented as a library of “C” functions which link with existing user code to make possible simple control of all Acromag PMC boards. Acromag provides a software product (sold separately) consisting of BOARD QNX board QNX...
  • Page 7: Preparation For Use

    For repairs to a product damaged in shipment, refer to the Acromag Service Policy to obtain return instructions. It is suggested that salvageable shipping cartons and packing material be saved for future use in the event the product must be shipped.
  • Page 8: Front Panel I/O

    SCSI-3 68-pin female connector (AMP 787082-7 or equivalent) employing latch blocks and 30 micron gold in the mating area (per MIL-G- 45214, Type II, Grade C). Connects to Acromag termination panel 5025- 288 from the front panel via round shielded cable (Model 5028-432).
  • Page 9: Rear J4 Field I/O Connector

    Care should be taken in designing installations without isolation to avoid noise pickup and ground loops caused by multiple ground connections. This is particularly important for analog inputs and outputs when a high level of accuracy/resolution is needed. _________________________________________________________________________________________ Acromag, Inc. Tel:248-295-0310 Fax:248-624-9234 Email:solutions@acromag.com http://www.acromag.com...
  • Page 10: Programming Information

    Base Address Registers and the Interrupt Line Register which must be read to determine the base address assigned to the board and the interrupt request line that goes active on a board interrupt request. _________________________________________________________________________________________ Acromag, Inc. Tel:248-295-0310 Fax:248-624-9234 Email:solutions@acromag.com http://www.acromag.com...
  • Page 11: Memory Map

    Channel 0 - FIFO Control Register READ/WRITE – LCR Channel 0 - Line Control Register READ/WRITE – MCR Channel 0 - Modem Control Register READ – LSR Channel 0 - Line Status Register _________________________________________________________________________________________ Acromag, Inc. Tel:248-295-0310 Fax:248-624-9234 Email:solutions@acromag.com http://www.acromag.com...
  • Page 12 140-17F READ Data Width 180-1FF Channel 0 – Read FIFO with errors 16/32 UART Channel 1 Channel 1 – Registers 200-20F Reserved 210-2FF READ Data Width 300-33F Channel 1 – Read FIFO 8/16/24/32 _________________________________________________________________________________________ Acromag, Inc. Tel:248-295-0310 Fax:248-624-9234 Email:solutions@acromag.com http://www.acromag.com...
  • Page 13 Two FIFO modes are possible: FIFO Interrupt Mode and FIFO Polled Mode. Some registers operate differently between the available modes and this is noted in the following paragraphs. _________________________________________________________________________________________ Acromag, Inc. Tel:248-295-0310 Fax:248-624-9234 Email:solutions@acromag.com http://www.acromag.com...
  • Page 14: Device Configuration Registers

    3. MPIOLVL bits 7 to 1 should be left in their default state (low). 4. MPIOLVL bit 0 now acts as the Global Interrupt Enable bit. 0 = Disable Interrupt 1 = Enable Interrupt _________________________________________________________________________________________ Acromag, Inc. Tel:248-295-0310 Fax:248-624-9234 Email:solutions@acromag.com http://www.acromag.com...
  • Page 15: Uart Configuration Registers

    16-bit binary format. The DLL register stores the low-order byte of the divisor and DLM stores the high-order byte. These registers default to random values during upon power up and must be loaded during initialization. _________________________________________________________________________________________ Acromag, Inc. Tel:248-295-0310 Fax:248-624-9234 Email:solutions@acromag.com http://www.acromag.com...
  • Page 16: Ier - Interrupt Enable Register

    (based on the 14.7456MHz clock at 16X clock rate). A different external crystal can replace the 14.7456MHz crystal on the circuit board to obtain unique clock rates. You may contact Acromag Applications Engineering to explore options in this area.
  • Page 17: Isr - Interrupt Status Register

    Note, only the current pending interrupt is cleared by the read. A lower level interrupt may be seen after re-reading the interrupt status bits. _________________________________________________________________________________________ Acromag, Inc. Tel:248-295-0310 Fax:248-624-9234 Email:solutions@acromag.com http://www.acromag.com...
  • Page 18 Special character interrupt is cleared by a read of the ISR register or after the next character is received.  RTS#/DTR# and CTS# status change interrupts are cleared by a read to the MSR register. _________________________________________________________________________________________ Acromag, Inc. Tel:248-295-0310 Fax:248-624-9234 Email:solutions@acromag.com http://www.acromag.com...
  • Page 19: Fcr - Fifo Control Register

    FCTR bits 6-7 are used to select one of four trigger tables Table Bit 5 Bit 4 Trigger Level 1 (default) Programmable _________________________________________________________________________________________ Acromag, Inc. Tel:248-295-0310 Fax:248-624-9234 Email:solutions@acromag.com http://www.acromag.com...
  • Page 20: Lcr - Line Control Register

    1 = Forces the transmitter output (TX) to a “space”, LOW, for alerting the remote receiver Enable of a line break condition. This condition remains until disabled by setting LCR bit-6 to a logic 0. _________________________________________________________________________________________ Acromag, Inc. Tel:248-295-0310 Fax:248-624-9234 Email:solutions@acromag.com http://www.acromag.com...
  • Page 21: Mcr - Modem Control Register

    (default) 1 = Divide by four. The prescaler divides the input clock from the crystal by four and feeds it to the Programmable Baud Rate Generator, hence, data rates become one-forth. _________________________________________________________________________________________ Acromag, Inc. Tel:248-295-0310 Fax:248-624-9234 Email:solutions@acromag.com http://www.acromag.com...
  • Page 22: Lsr - Line Status Register

    1 = The receiver received a break signal (RX was a logic 0 for one character frame time). In FIFO mode, only one break character is loaded into the FIFO. This bit is cleared after LSR is read. _________________________________________________________________________________________ Acromag, Inc. Tel:248-295-0310 Fax:248-624-9234 Email:solutions@acromag.com http://www.acromag.com...
  • Page 23: Msr - Modem Status Register

    CTS# pin will stop UART transmitter as soon as the current character has finished transmission, and a logic 0 will resume data transmission. If automatic hardware flow control is not used, MSR bit-4 is the compliment of the CTS# input. _________________________________________________________________________________________ Acromag, Inc. Tel:248-295-0310 Fax:248-624-9234 Email:solutions@acromag.com http://www.acromag.com...
  • Page 24: Scr - Scratch Pad Register

    1101 ± 20 1110 ± 28 1111 ± 36 1000 ± 40 1001 ± 44 1010 ± 48 1011 ± 52 Infrared RX Not supported Input Logic Select Auto RS485 Not supported Enable _________________________________________________________________________________________ Acromag, Inc. Tel:248-295-0310 Fax:248-624-9234 Email:solutions@acromag.com http://www.acromag.com...
  • Page 25: Efr - Enhanced Feature Register

    1 = Enables the enhanced functions. Allows the IER bits 4-7, ISR bits 4-5, FCR bits 4- 5, and MCR bits 5-7 to be modified. _________________________________________________________________________________________ Acromag, Inc. Tel:248-295-0310 Fax:248-624-9234 Email:solutions@acromag.com http://www.acromag.com...
  • Page 26: Function Programming

    When trigger table D is selected, an 8-bit value written to this register sets the TX FIFO trigger level (0 to 64). If enabled, an interrupt will be generated whenever the data level in the transmit FIFO falls below this preset trigger level. _________________________________________________________________________________________ Acromag, Inc. Tel:248-295-0310 Fax:248-624-9234 Email:solutions@acromag.com http://www.acromag.com...
  • Page 27: Rxcnt - Receive Fifo Level Counter

    This register provides a faster alternative to writing data in 8-bit format to the transmit holding register (THR). Using this register, TX FIFO data can be written using 32-bit write operations (maximum 16 DWORD writes). The data is formatted as follows: _________________________________________________________________________________________ Acromag, Inc. Tel:248-295-0310 Fax:248-624-9234 Email:solutions@acromag.com http://www.acromag.com...
  • Page 28: Read Rx Fifo With Errors Register

    Bits 7:0 = 0x00 RXTRG Bits 7:0 = 0x00 XCHAR Bits 7:0 = 0x00 XON1 Bits 7:0 = 0x00 XON2 Bits 7:0 = 0x00 XOFF1 Bits 7:0 = 0x00 XOFF2 Bits 7:0 = 0x00 _________________________________________________________________________________________ Acromag, Inc. Tel:248-295-0310 Fax:248-624-9234 Email:solutions@acromag.com http://www.acromag.com...
  • Page 29: Reset State

    1. LSR Bit 0 is set to 1 when a character is transferred from the shift register to the receiver FIFO. It is reset to 0 when the FIFO is empty. 2. The receiver line-status interrupt (ISR=06) has a higher priority than the received data-available interrupt (ISR=04). _________________________________________________________________________________________ Acromag, Inc. Tel:248-295-0310 Fax:248-624-9234 Email:solutions@acromag.com http://www.acromag.com...
  • Page 30: Loopback Mode Operation

    XOFF2 registers. Two XON and XOFF registers are provided because the flow control character may be 1 or 2 bytes long. The contents of the XON and XOFF registers are reset to “0” upon power-up or system reset, and _________________________________________________________________________________________ Acromag, Inc. Tel:248-295-0310 Fax:248-624-9234 Email:solutions@acromag.com http://www.acromag.com...
  • Page 31: Hardware Flow Control

    Two interrupts are associated with auto RTS/CTS flow control and may be used to give indication when the RTS# pin or CTS# pin are de-asserted during operation. Setting IER bit-6 will enable the RTS# interrupt when _________________________________________________________________________________________ Acromag, Inc. Tel:248-295-0310 Fax:248-624-9234 Email:solutions@acromag.com http://www.acromag.com...
  • Page 32: Programming Example

    6. Write 25H to the FIFO Control Register (FCR) This enables and resets the TX FIFO. It also sets the Transmit Trigger Level to 32. 7. Write 02H to the Modem Control Register (MCR) This enables the channel’s transmitter _________________________________________________________________________________________ Acromag, Inc. Tel:248-295-0310 Fax:248-624-9234 Email:solutions@acromag.com http://www.acromag.com...
  • Page 33: Theory Of Operation

    By providing a separate data path for transmit and receive, full-duplex operation is accomplished. The maximum data transmission cable length is generally limited to 4000 feet without a signal repeater installed. _________________________________________________________________________________________ Acromag, Inc. Tel:248-295-0310 Fax:248-624-9234 Email:solutions@acromag.com http://www.acromag.com...
  • Page 34 Binary 1 (1, 1-1/2, or 2 Bit times) With start, stop, and parity in mind, for an asynchronous data byte, note that at least one bit will be a 1 (the stop bit). This defines the break signal _________________________________________________________________________________________ Acromag, Inc. Tel:248-295-0310 Fax:248-624-9234 Email:solutions@acromag.com http://www.acromag.com...
  • Page 35: Pmc521 Operation

    A programmable UART device installed on the PMC Module provides the control signals required to operate the board. It decodes the selected addresses and produces the chip selects, control signals, and timing required by the communication registers. _________________________________________________________________________________________ Acromag, Inc. Tel:248-295-0310 Fax:248-624-9234 Email:solutions@acromag.com http://www.acromag.com...
  • Page 36: Service And Repair

    5.0 SERVICE AND repair. It is highly recommended that a non-functioning board be returned to REPAIR Acromag for repair. The board can be easily damaged unless special SMT repair and service tools are used. Further, Acromag has automated test SERVICE AND REPAIR equipment that thoroughly checks the performance of each board.
  • Page 37: Specifications Physical

    Radiated Emissions: Meets or exceeds European Norm EN50081-1 for class B equipment. Shielded cable with I/O connections in shielded enclosure are required to meet compliance. Mean Time Between Failure: 2,321,047 hours at 25C by MIL-HDBK- 217F, notice 2. _________________________________________________________________________________________ Acromag, Inc. Tel:248-295-0310 Fax:248-624-9234 Email:solutions@acromag.com http://www.acromag.com...
  • Page 38: Uart

    Data Rate: Up to 3.000Mbps (Limited to by XR17D158B UART). RS-422/485 Receiver Inputs Input Voltage Range: -8V to +12.5V DC Maximum. Input High Threshold: 2.0V Minimum. Input Low Threshold: 0.8V Maximum. Input Resistance: 12K Minimum, 25K Typical. _________________________________________________________________________________________ Acromag, Inc. Tel:248-295-0310 Fax:248-624-9234 Email:solutions@acromag.com http://www.acromag.com...
  • Page 39: Pci Local Bus Interface

    Signaling: Universal PCI Bus buffers – Auto sense 3.3V or 5V operation. INTA#: Interrupt A is used to request an interrupt. Source of interrupt can be from the Digital I/O, or Counter/Timer Functions. Access Times: 8 PCI Clock Cycles for all register accesses. _________________________________________________________________________________________ Acromag, Inc. Tel:248-295-0310 Fax:248-624-9234 Email:solutions@acromag.com http://www.acromag.com...
  • Page 40: Appendix

    Application: To connect field I/O signals to the board. Termination MODEL 5025-288 Panel: Acromag Part 4001-066. The 5025-288 termination panel facilitates the connection of up to 68 field I/O signals and connects to the board (connectors only) via a round shielded cable (Model 5028- 432).
  • Page 41: 4502-021 Pmc521 Block Diagram

    PMC521 User’s Manual EIA/TIA-422B SERIAL COMMUNICATION BOARD ___________________________________________________________________ _________________________________________________________________________________________ Acromag, Inc. Tel:248-295-0310 Fax:248-624-9234 Email:solutions@acromag.com http://www.acromag.com...
  • Page 42: 4502-020 Pmc521 Interface Diagram

    PMC521 User’s Manual EIA/TIA-422B SERIAL COMMUNICATION BOARD __________________________________________________________________ Tx D+ Tx D Tx D- Rx D_ ENABL E Rx D+ Rx D Rx D- Tx D_ ENABL E _________________________________________________________________________________________ Acromag, Inc. Tel:248-295-0310 Fax:248-624-9234 Email:solutions@acromag.com http://www.acromag.com...
  • Page 43: 4502-019 Pmc521 Resistor Locations

    PMC521 User’s Manual EIA/TIA-422B SERIAL COMMUNICATION BOARD ___________________________________________________________________ _________________________________________________________________________________________ Acromag, Inc. Tel:248-295-0310 Fax:248-624-9234 Email:solutions@acromag.com http://www.acromag.com...
  • Page 44: Top View

    17 18 20 21 23 24 26 27 TERMINATION 37 38 42 43 45 46 48 49 51 52 54 55 59 60 62 63 65 66 MARKINGS 2.7" (68.58) 4501-920C FRONT VIEW _________________________________________________________________________________________ Acromag, Inc. Tel:248-295-0310 Fax:248-624-9234 Email:solutions@acromag.com http://www.acromag.com...
  • Page 45 EIA/TIA-422B SERIAL COMMUNICATION BOARD ___________________________________________________________________ Revision History The following table shows the revision history for this document: Release Date Version EGR/DOC Description of Revision 24 APR 2018 CAB/ARP Correction of Maximum Data Rate (Mbps). _________________________________________________________________________________________ Acromag, Inc. Tel:248-295-0310 Fax:248-624-9234 Email:solutions@acromag.com http://www.acromag.com...

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