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Acromag IOS-484 User Manual

Counter timer module
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IOS-484
Counter Timer Module
USER'S MANUAL
ACROMAG INCORPORATED
Tel: (248) 295-0310
30765 South Wixom Road
Fax: (248) 624-9234
P.O. BOX 437
Wixom, MI 48393-7037 U.S.A.
solutions@acromag.com
Copyright 2009-2011, Acromag, Inc., Printed in the USA.
8500-850-B11C007
Data and specifications are subject to change without notice.

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Summary of Contents for Acromag IOS-484

  • Page 1 USER’S MANUAL ACROMAG INCORPORATED Tel: (248) 295-0310 30765 South Wixom Road Fax: (248) 624-9234 P.O. BOX 437 Wixom, MI 48393-7037 U.S.A. solutions@acromag.com Copyright 2009-2011, Acromag, Inc., Printed in the USA. 8500-850-B11C007 Data and specifications are subject to change without notice.

  • Page 2: Table Of Contents

    IOS-484 I/O Server Module User’s Manual Counter Timer Module __________________________________________________________________ TABLE OF IMPORTANT SAFETY CONSIDERATIONS You must consider the possible negative effects of power, wiring, CONTENTS component, sensor, or software failure in the design of any type of control or monitoring system. This is very important where property loss or human life is involved.
  • Page 3 IOS-484 I/O Server Module User’s Manual Counter Timer Module ___________________________________________________________________ PROGRAMMING EXAMPLES………………………… TABLE OF Quadrature Position Measurement Example.. CONTENTS Pulse Width Modulation Example..…...……... Watchdog Timer Operation Example....Event Counting Operation Example....Frequency Measurement Operation Example. Input Pulse Width Measurement Example..

  • Page 4: Key Ios-484 Counter/Timer Features

    IOS-484 I/O Server Module User’s Manual Counter Timer Module __________________________________________________________________ 1.0 GENERAL The I/O Server Module (IOS) Series IOS-484 module provides support for five independent 16-bit multifunction counter/timers. Each counter/timer INFORMATION can be configured for quadrature position measurement, pulse width modulated output, watchdog timer, event counter, frequency measurement, pulse width measurement, period measurement, or one shot pulse output.

  • Page 5: Ios Module Win32 Driver Software

    Digital I/O – The IOS-484 has 3 RS485/RS422 outputs and 1 RS485/RS422 input available for use. Acromag provides a software product (sold separately) to facilitate the...

  • Page 6: Unpacking And Inspection

    For repairs to a product damaged in shipment, refer to the Acromag Service Policy to obtain return instructions. It is suggested that salvageable shipping cartons and packing material be saved for future use in the event the product must be shipped.
  • Page 7 IOS-484 I/O Server Module User’s Manual Counter Timer Module ___________________________________________________________________ Table 2.1: IOS-484 Field I/O Pin Connections Description Number Description Number RS485/RS422 The IOS-484 has 5 In1_A+ In4_B- RS485/RS422 16-bit counters In1_A- In5_B+ available. In2_A+ In5_B- Additionally, it has 1 RS485...

  • Page 8: I/O Noise And Grounding Considerations

    Counter Timer Module __________________________________________________________________ CONNECTORS The IOS-484 is non-isolated between the logic and field I/O grounds since output common is electrically connected to the IOS module ground. I/O Noise and Grounding Consequently, the field I/O connections are not isolated from the carrier Considerations board and backplane.

  • Page 9: Ios Identification Space

    64 byte block (on the ―Big Endian‖ VMEbus). Even addresses are used on the ―Little Endian‖ PC ISA or PCI buses. The IOS-484 ID Space is shown in Table 3.1. Note that the base- address for the IOS module ID space (see your carrier board instructions) must be added to the addresses shown to properly access the ID information.

  • Page 10: Memory Map

    16-bit words (128 bytes) using address lines A1..A6, but the IOS-484 uses only a portion of this space. The memory space address map for the IOS-484 is shown in Table 3.2. Note that the base address for the IOS-484 in memory space must be added to the addresses shown to properly access the IOS-484 registers.
  • Page 11 Counter 1 Constant A Register Counter 2 Constant A Register Counter 3 Constant A Register Counter 4 Constant A Register Counter 5 Constant A Register 1. The IOS-484 will return 0 for ↓ ↓ Not Used all addresses that are "Not Used".

  • Page 12: Board Control Register

    11 to 14 Not Used return logic “0” when read. Software Reset: Write logic ―1‖ to this bit to reset the IOS-484. Interrupt Status/Clear Register (Read/Write) – (Base +02H) This read/write register is used to determine the pending status of the...

  • Page 13: Counter Trigger Register

    IOS-484 I/O Server Module User’s Manual Counter Timer Module ___________________________________________________________________  Read of this bit reflects the interrupt pending status of the counter timer CONTROL REGISTERS logic. 0 = Interrupt Not Pending 1 = Interrupt Pending  Write a logic ―1‖ to this bit to release a counter timer pending interrupt. A counter timer pending interrupt can also be released by disabling interrupts via bit-15 of the Counter Control registers.

  • Page 14: Counter Stop Register

    IOS-484 I/O Server Module User’s Manual Counter Timer Module __________________________________________________________________ CONTROL REGISTERS Counter Stop Register (Write) - (Base + 06H) This register is used to stop the counters of one or a group of Counter/Timers. Writing a 1 to the counter’s corresponding stop bit of this register will cause the counter to be disabled.

  • Page 15: Digital Input Register

    IOS-484 I/O Server Module User’s Manual Counter Timer Module ___________________________________________________________________ CONTROL REGISTERS Digital Input Register (Read) – (Base + 58H) This 8-bit read only register contains the value of the digital RS485/RS422 inputs. A read value of one symbolizes a logic ―high‖ while a value of zero represents a logic ―low‖.
  • Page 16 The IOS-484 has five 16-bit Counter/Timers. The Counter/Timers have Differential (RS485/RS422) I/O. The memory map addresses corresponding to the control registers are given in Table 3.2. The Counter Control Register is cleared (set to 0) following a reset, thus disabling the counter/timer.
  • Page 17 IOS-484 I/O Server Module User’s Manual Counter Timer Module ___________________________________________________________________ Quadrature Position Measurement COUNTER CONTROL REGISTER The counter/timers may be used to perform position measurements from quadrature motion encoders. Bits 2 to 0 of the Counter Control Register set to logic ‖001‖ configure the counter for quadrature measurement.
  • Page 18 IOS-484 I/O Server Module User’s Manual Counter Timer Module __________________________________________________________________ specify for reload. The phase can be selected via the counter timer control register bits 9, 8, and 7 as seen in Table 3.10. COUNTER CONTROL An interrupt can be generated upon index reload, or when the counter REGISTER value equals the constant value stored in the Counter Constant A Register.
  • Page 19 IOS-484 I/O Server Module User’s Manual Counter Timer Module ___________________________________________________________________ COUNTER CONTROL The Counter Control register bits 11 and 10 are used to control the operation of the counter output signal. With bits 11 and 10 set to ―01‖, the...

  • Page 20: Pulse Width Modulation

    IOS-484 I/O Server Module User’s Manual Counter Timer Module __________________________________________________________________ Pulse Width Modulation COUNTER CONTROL REGISTER Pulse width modulated waveforms may be generated at the counter timer output. The pulse width modulated waveform is generated continuously. Pulse Width Modulation generation is selected by setting Counter Control Register bits 2 to 0 to logic ―010‖.
  • Page 21 IOS-484 I/O Server Module User’s Manual Counter Timer Module ___________________________________________________________________ COUNTER CONTROL REGISTER PULSE WIDTH Bit(s) FUNCTION MODULATION 2,1,0 Specifies the Counter Mode: Pulse Width Modulation Output Polarity (Output Pin ACTIVE Level): Table 3.11: Counter Control Active LOW (Default) Register...

  • Page 22: Watchdog Timer Operation

    Upon time-out, the counter output pin returns to its inactive state. The IOS-484 will also issue an interrupt upon detection of a count value equal to 0, if enabled via bit-15 of the Counter Control Register. This could be useful for alerting the host that a watchdog timer time-out has occurred and may need to be reinitialized.
  • Page 23 IOS-484 I/O Server Module User’s Manual Counter Timer Module ___________________________________________________________________ COUNTER CONTROL REGISTER WATCHDOG TIMER Bit(s) FUNCTION OPERATION 2,1,0 Specifies the Counter Mode: Watchdog Function Table 3.12: Counter Control Output Polarity (Output Pin ACTIVE Level): Register (Watchdog Timer) Active LOW (Default)

  • Page 24: Event Counting Operation

    IOS-484 I/O Server Module User’s Manual Counter Timer Module __________________________________________________________________ COUNTER CONTROL Event Counting Operation REGISTER Positive or negative polarity events can be counted. Event Counting is selected by setting Counter Control Register bits 2 to 0 to logic ―100‖ and setting bits 12 to 10 to logic ―000‖.
  • Page 25 IOS-484 I/O Server Module User’s Manual Counter Timer Module ___________________________________________________________________ COUNTER CONTROL REGISTER EVENT COUNTING Bit(s) FUNCTION 2,1,0 Specifies the Counter Mode: OPERATION Event Counting Output Polarity (Output Pin ACTIVE Level): Table 3.13: Counter Control Active LOW (Default) Register Active HIGH...

  • Page 26: Frequency Measurement Operation

    IOS-484 I/O Server Module User’s Manual Counter Timer Module __________________________________________________________________ COUNTER CONTROL Frequency Measurement Operation REGISTER Frequency Measurement is selected by setting Counter Control Register bits 2 to 0 to logic ―100‖ and setting bits 12 to 10 to logic ―111‖. The counter counts how many InB edges (low to high or high to low) are received during the InA enable interval.
  • Page 27 IOS-484 I/O Server Module User’s Manual Counter Timer Module ___________________________________________________________________ COUNTER CONTROL REGISTER FREQUENCY Bit(s) FUNCTION MEASUREMENT 2,1,0 Specifies the Counter Mode: OPERATION Frequency Measurement Output Polarity (Output Pin ACTIVE Level): Table 3.14: Counter Control Active LOW (Default) Register (Frequency Measurement)

  • Page 28: Input Pulse Width Measurement

    IOS-484 I/O Server Module User’s Manual Counter Timer Module __________________________________________________________________ COUNTER CONTROL Input Pulse Width Measurement REGISTER Setting bits 2 to 0 of the Counter Control Register to logic ―101‖ configures the counter for pulse-width measurement. After pulse-width measurement is triggered, the first input pulse is measured.
  • Page 29 IOS-484 I/O Server Module User’s Manual Counter Timer Module ___________________________________________________________________ COUNTER CONTROL REGISTER INPUT PULSE WIDTH Bit(s) FUNCTION MEASUREMENT 2,1,0 Specifies the Counter Mode: Pulse-Width Measurement Table 3.15: Counter Control Output Polarity (Output Pin ACTIVE Level): Register Active LOW (Default)

  • Page 30: Input Period Measurement

    IOS-484 I/O Server Module User’s Manual Counter Timer Module __________________________________________________________________ COUNTER CONTROL Input Period Measurement REGISTER The counter/timer may be used to measure the period of an input signal at the counter input InA. Setting bits 2 to 0 of the Counter Control Register to logic ―110‖...
  • Page 31 IOS-484 I/O Server Module User’s Manual Counter Timer Module ___________________________________________________________________ COUNTER CONTROL REGISTER INPUT PERIOD Bit(s) FUNCTION 2,1,0 Specifies the Counter Mode: MEASUREMENT Period Measurement Output Polarity (Output Pin ACTIVE Level): Table 3.16: Counter Control Active LOW (Default) Register Active HIGH...

  • Page 32: One-Shot Pulse Mode

    IOS-484 I/O Server Module User’s Manual Counter Timer Module __________________________________________________________________ COUNTER CONTROL One-Shot Pulse Mode REGISTER One-Shot pulse mode provides an output pulse that is asserted one time or repeated each time it is re-triggered. One-Shot generation is selected by setting Counter Control Register bits 2 to 0 to logic ―111‖.
  • Page 33 IOS-484 I/O Server Module User’s Manual Counter Timer Module ___________________________________________________________________ COUNTER CONTROL REGISTER Bit(s) FUNCTION ONE-SHOT PULSE 2,1,0 Specifies the Counter Mode: MODE One-Shot Generation Output Polarity (Output Pin ACTIVE Level): Table 3.17: Counter Control Active LOW (Default) Register (One-Shot Pulse)

  • Page 34: Programming Examples

    IOS-484 I/O Server Module User’s Manual Counter Timer Module __________________________________________________________________ PROGRAMMING The following section provides sample applications for each of the counter modes of operation. This includes I/O pin assignments, register EXAMPLES settings, required calculations, and waveform diagrams. All examples assume 8MHz carrier operation, even addressing, and that all values are read and written in hex.
  • Page 35 IOS-484 I/O Server Module User’s Manual Counter Timer Module ___________________________________________________________________ While Counter Constant A is not used in this example, it has other applications in Quadrature Position Measurement. Refer to the description of Quadrature mode for further information. PROGRAMMING 4. The following is a waveform diagram of this example. Since Quadrature...

  • Page 36: Watchdog Timer Operation Example

    IOS-484 I/O Server Module User’s Manual Counter Timer Module __________________________________________________________________ Not used. Enables interrupts. PROGRAMMING 3. Write the 16-bit value 3H to Counter 3 Constant A Register located at EXAMPLES base address plus an offset 34H for the non-active portion of the pulse, and 1H to Counter 3 Constant B Register located at base address plus an offset 48H for the active portion of the pulse.
  • Page 37 IOS-484 I/O Server Module User’s Manual Counter Timer Module ___________________________________________________________________ PROGRAMMING 1. Connect the inputs/output to the following pins (unpowered): EXAMPLES Pin # Connection Pin # Connection Description Table 3.22: Watchdog Pin In5_A(+) In5_A(-) Reload Assignments for Counter 5 In5_B(+) In5_B(-) Ext.

  • Page 38: Event Counting Operation Example

    IOS-484 I/O Server Module User’s Manual Counter Timer Module __________________________________________________________________ PROGRAMMING Note that the InA and InC inputs run off the internal 8MHz (or 32MHz) EXAMPLES clock. Those signals may not be synchronous with the selected clock. For further information, see the Watchdog Timer Operation description.

  • Page 39: Frequency Measurement Operation Example

    IOS-484 I/O Server Module User’s Manual Counter Timer Module ___________________________________________________________________ PROGRAMMING 4. The following is a waveform diagram of this example. EXAMPLES Figure 3.5: Event Counting waveform Output In the figure each ―i‖ represents an interrupt Interrupts The Gate-Off signal is used in this example to pause the counter.

  • Page 40: Input Pulse Width Measurement Example

    IOS-484 I/O Server Module User’s Manual Counter Timer Module __________________________________________________________________ PROGRAMMING 3. Do not write to either of the Counter 4 Constant Registers. They are not EXAMPLES required for frequency measurement and writing to them can cause errors. 4. The following is a waveform diagram of this example.
  • Page 41 IOS-484 I/O Server Module User’s Manual Counter Timer Module ___________________________________________________________________ PROGRAMMING 2. Write the following information, 959DH, to Counter 2 Control Register located at base address plus an offset of 0AH. EXAMPLES Table 3.29: Pulse-Width Bits Logic Operation Measurement Control Register 2,1,0 Sets the counter to Pulse-Width Measurement.

  • Page 42: Input Period Measurement Example

    IOS-484 I/O Server Module User’s Manual Counter Timer Module __________________________________________________________________ PROGRAMMING Input Period Measurement Example EXAMPLES The objective for this example is to use the Input Period Measurement operation using 16-bit Counter 1. The high-to-low transition of the input signal will begin measurement. Additionally, the counter has an external clock and an active high External Trigger.

  • Page 43: One-Shot Pulse Mode Example

    IOS-484 I/O Server Module User’s Manual Counter Timer Module ___________________________________________________________________ PROGRAMMING The period of one cycle of the InA waveform is calculated by multiplying the number in the Counter 1 Read Back Register, located at the base EXAMPLES address plus an offset of 1CH, by the period of the selected clock. Note that the value in the Read Back Register is stored in Hex and requires conversion to decimal for calculations.
  • Page 44 IOS-484 I/O Server Module User’s Manual Counter Timer Module __________________________________________________________________ PROGRAMMING 3. Write the 16-bit value 4H to Counter 2 Constant A Register located at EXAMPLES base address plus an offset 32H for the non-active portion of the pulse, and 1H to Counter 2 Constant B Register located at base address plus an offset 46H for the active portion of the pulse.
  • Page 45 IOS-484 I/O Server Module User’s Manual Counter Timer Module ___________________________________________________________________ Table 3.34: Counter Timer Modes Overview Function Pulse Width Watchdog Event Frequency Pulse Period Quadrature Description Modulation/ Counting Measure Measure Measure Position One-Shot Measure InA Input Gate-Off for Counter Gate-Off for...

  • Page 46: Theory Of Operation

    This section contains information regarding the hardware of the IOS- 4.0 THEORY OF 484. A description of the basic functionality of the circuitry used on the board is also provided. Refer to the IOS-484 Block Diagram as you review OPERATION this material.

  • Page 47: Service And Repair

    Surface-Mounted Technology (SMT) boards are generally difficult to REPAIR repair. It is highly recommended that a non-functioning board be returned to Acromag for repair. The board can be easily damaged unless special SMT repair and service tools are used. Further, Acromag has automated test SERVICE AND REPAIR equipment that thoroughly checks the performance of each board.

  • Page 48: Specifications

    IOS-484 I/O Server Module User’s Manual Counter Timer Module __________________________________________________________________ Physical Configuration Single I/O Server Module SPECIFICATIONS Length 4.030 in. (102.36 mm) Width 1.930 in. (49.02 mm) Board Thickness 0.062 in. (1.59 mm) Height 0.500 in. (12.7 mm) Power Module Table 6.1: Power...

  • Page 49: Counter/Timers

    Modulation, Watchdog Timer, Event Counting, Frequency Measurement, Period Measurement, Pulse-Width Measurement, and One Shot/Repetitive Counter Type: - The IOS-484 has a total of five counter/timers available for use with differential RS485/RS422 I/O. RS485/RS422 Counter Input Counters 1 through 5 have Differential RS485/RS422 input signals of InA, InB, and InC.

  • Page 50: Digital I/O

    IOS-484 I/O Server Module User’s Manual Counter Timer Module __________________________________________________________________ Minimum Period Measurement: 300ns Minimum Gate/Trigger Pulse: 125ns SPECIFICATIONS 32MHz IOS Carrier Selectable Counter Clock Frequencies : 32MHz, 16MHz, 8MHz, 4MHz, Operation 2Mhz or External up to 8MHz. Minimum I/P Event: 31.25ns Minimum Pulse Measurement: 31.25ns...
  • Page 51 INTERFACE INTERFACE FPGA RS485/TTL CONVERSION BUFFER IN A+(1-5) INTERFACE IN A-(1-5) COUNTER TIMER CONTROL LOGIC RS485/TTL CONVERSION BUFFER IN B+(1-5) RS485/RS422 16-BIT COUNTER COUNTER #1 IN B-(1-5) TIMER INPUT 16-BIT RS485/TTL CONVERSION COUNTER #2 BUFFER IN C+(1-5) IN C-(1-5) 16-BIT COUNTER #4 RS485/TTL CONVERSION BUFFER...

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