• INTEG Register
Bit
7
Name
—
R/W
—
POR
—
Bit 7~4
Unimplemented, read as "0"
Bit 3~2
INT1S1~INT1S0: Interrupt edge control for INT1 pin
00: Disable
01: Rising edge
10: Falling edge
11: Rising and falling edges
Bit 1~0
INT0S1~INT0S0: Interrupt edge control for INT0 pin
00: Disable
01: Rising edge
10: Falling edge
11: Rising and falling edges
• INTC0 Register
Bit
7
Name
—
R/W
—
POR
—
Bit 7
Unimplemented, read as "0"
Bit 6
MF0F: Multi-function 0 interrupt request flag
0: No request
1: Interrupt request
Bit 5
CPF: Comparator interrupt request flag
0: No request
1: Interrupt request
Bit 4
INT0F: INT0 interrupt request flag
0: No request
1: Interrupt request
Bit 3
MF0E: Multi-function 0 interrupt control
0: Disable
1: Enable
Bit 2
CPE: Comparator interrupt control
0: Disable
1: Enable
Bit 1
INT0E: INT0 interrupt control
0: Disable
1: Enable
Bit 0
EMI: Global interrupt control
0: Disable
1: Enable
Rev. 1.20
6
5
4
—
—
—
—
—
—
—
—
—
6
5
4
MF0F
CPF
INT0F
R/W
R/W
R/W
0
0
0
178
HT45F8544
BMS Flash MCU
3
2
1
INT1S1
INT1S0
INT0S1
R/W
R/W
R/W
0
0
0
3
2
1
MF0E
CPE
INT0E
R/W
R/W
R/W
0
0
0
January 31, 2024
0
INT0S0
R/W
0
0
EMI
R/W
0
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