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Phytec phyCORE-MPC555 Hardware Manual

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phyCORE-MPC555
Hardware Manual
Edition August 2001
A product of a PHYTEC Technology Holding company

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Summary of Contents for Phytec phyCORE-MPC555

  • Page 1 Hardware Manual Edition August 2001 A product of a PHYTEC Technology Holding company...
  • Page 2 PHYTEC Meßtechnik GmbH neither gives any guarantee nor accepts any liability whatsoever for consequential damages resulting from the use of this manual or its associated product. PHYTEC Meßtechnik GmbH reserves the right to alter the information contained herein without prior notification and accepts no responsibility for any damages which might result.

  • Page 3: Table Of Contents

    Contents Preface ......................1 Introduction ..................1 1.1 Block Diagram................4 1.2 View of the phyCORE-MPC555..........5 Pin Description ..................7 Jumpers ....................21 Power System and Reset Behavior ..........29 Start-up System Configuration ............33 5.1 Power-On-Reset Phase ...............33 5.2 Hard-Rest-Configuration-Word..........34 System Memory .................35 6.1 Memory Model after Reset............35 6.2 Runtime Memory Model ............36...
  • Page 4 Numbering of the Jumper-Pads..........21 Figure 5: Location of the Jumpers (component side) and default- setting (standard version of the phyCORE-MPC555) ..... 21 Figure 6: Location of the jumpers (soldering side) and default- setting (standard version of the phyCORE-MPC555) ..... 22 Figure 7: Power Concept .................

  • Page 5: Preface

    (such as electricians, technicians and engineers) handle and/or operate these products. Moreover, PHYTEC products should not be operated without protection circuitry if connections to the product’s pin header rows are longer than 3 m. © PHYTEC Meßtechnik GmbH 2000...
  • Page 6 Statutes. Only after doing so are the devices allowed to be put into circulation. The phyCORE-MPC555 is one of a series of PHYTEC Single Board Computers that can be fitted with different controllers and, hence, offers various functions and configurations. PHYTEC supports...

  • Page 7: Introduction

    The phyCORE-MPC555 is a subminiature (72 x 57 mm) insert-ready Single Board Computer populated with Motorola’s PowerPC MPC555 microcontroller. Its universal design enables its insertion in a wide range of embedded applications.
  • Page 8 The phyCORE-MPC555 offers the following features: • Single Board Computer in subminiature form factor (57 x 72 mm) according to phyCORE specifications •...

  • Page 9: Memory Configuration

    CAN transceiver 82C251 for both channels; also configurable as TTL • JTAG/BDM test-/debug port • Available in standard (0…+70°C) and industrial (-40…+85°C) temperature ranges For more information about additional configurations see the PHYTEC product catalog © PHYTEC Meßtechnik GmbH 2000 L-523e_2...

  • Page 10: Block Diagram

    B_CANRX, B_CANTX /WakeUp VDDH/VDDL +3.3V VBat 26kB SRAM JTAG/BDM MIOS MDA[0..9], MPWM[0..7] Counter/PWM/IO MPIO[0..15] A_TPU[0..15], B_TPU[0..15] TPU A TPU B A_T2CLK, B_T2CLK A_AD[0..15], B_AD[0..15] ADC A ADC B ETRIG[1,2] Figure 1: Block Diagram phyCORE-MPC555 © PHYTEC Meßtechnik GmbH 2000 L-523e_2...

  • Page 11: View Of The Phycore-Mpc555

    Introduction 1.2 View of the phyCORE-MPC555 R1 C9 CB13 CB14 CB10 Figure 2: View of the phyCORE-MPC555 © PHYTEC Meßtechnik GmbH 2000 L-523e_2...
  • Page 12 © PHYTEC Meßtechnik GmbH 2000 L-523e_2...

  • Page 13: Pin Description

    0,635 mm SMT-plugs (refered to as phyCORE-Connector) lining two sides of the board (refer to section 9). This allows the phyCORE-MPC555 to be plugged into any target application like a “big chip”. Many of the controller port pins accessible at the edges of the board have been assigned alternate functions that can be activated via soft- ware.
  • Page 14 43A, 44A, 45A, D6, D4, D3, SGPIOD14, SGPIOD12, SGPIOD11, SGPIOD9, SGPIOD6, SGPIOD4, SGPIOD3, SGPIOD1 (I/O) For use of the alternative function, note that the data lines are used to connect the on- board memory devices. © PHYTEC Meßtechnik GmbH 2000 L-523e_2...
  • Page 15 B_TPU7, B_TPU5, B_TPU3, B_TPU1 B_T2CLK I/O Clock signal of the TPU B of the MPC555 A_TPU15, I/O TPU-I/O signals connected to the TPU A of A_TPU13, the MPC555 A_TPU11, A_TPU9, A_TPU7, A_TPU5, A_TPU3, A_TPU1 © PHYTEC Meßtechnik GmbH 2000 L-523e_2...
  • Page 16 For use of the alternative function, note that the address lines are partially used for memory addressing. /WE2 Write-Enable signal 1 for data lines D[16..23] Alternative: AT2 (O) The alternative function can only be used when no on-board memory is populated. © PHYTEC Meßtechnik GmbH 2000 L-523e_2...
  • Page 17 B_TPU6, B_TPU4, B_TPU2, B_TPU0 A_T2CLK I/O Clock signal of the TPU A of the MPC555 A_TPU14, I/O TPU-I/O signals connected with the TPU A of A_TPU12, the MPC555 A_TPU10, A_TPU8, A_TPU6, A_TPU4, A_TPU2, A_TPU0 © PHYTEC Meßtechnik GmbH 2000 L-523e_2...
  • Page 18 RxD2 RxD input of the RS-232 transceiver of the second serial interface. J14 must be closed in order to use this interface. TxD2 TxD output of the RS-232 transceiver of the second serial interface. © PHYTEC Meßtechnik GmbH 2000 L-523e_2...
  • Page 19 Input-Capture or Output-Compare 44C, MDA3 Double-action I/O MDA[14, 12] of MDA1 the MPC555-MIOS. These signals serve as either Input-Capture or Output-Compare. Alternatively these signals serve the external reload of the counter register within the counter modules. © PHYTEC Meßtechnik GmbH 2000 L-523e_2...
  • Page 20 Analog input B_AN[2,0] of QADC module B_AD0 B on the MPC555 Alternative: ANY, ANW (I) Alternative: PQB[2,0] digital input (I) A_AD14, Analog input A_AN[58,56] of QADC A_AD12 module A on the MPC555 Alternative: PQA[6,4] digital I/O © PHYTEC Meßtechnik GmbH 2000 L-523e_2...
  • Page 21 Analog input A_AN[2,0] of QADC module A_AD0 A on the MPC555 Alternative: ANY, ANW (I) Alternative: PQB[2,0] digital input (I) VDDA Voltage supply +5V of the analog signals. VDDA is coupled with VDDH using a choke © PHYTEC Meßtechnik GmbH 2000 L-523e_2...
  • Page 22 CAN interface RxD1 RxD input of the RS-232 transceiver of the first serial interface. Jumper J13 must be closed to use this interface. TxD1 TxD output of the RS-232 transceiver of the first serial interface © PHYTEC Meßtechnik GmbH 2000 L-523e_2...
  • Page 23 Interrupt output of the RTC. /IRTC can be connected to /WAKEUP using jumper J15 DSDO Development-Serial-Data-Output of the MPC555 BDM port. Alternative: TDO- Test-Data-Out of the JTAG port (O). The HRCW (D11) determines the function. © PHYTEC Meßtechnik GmbH 2000 L-523e_2...
  • Page 24 A on the MPC555. With an activated CAN transceiver and J11 closed, the transceiver drives this pin. 59D, 64D, 69D, GNDA Ground 0V of the analog signals. GNDA is 74D, 79D connected to GND using the 0R resistor at R31. © PHYTEC Meßtechnik GmbH 2000 L-523e_2...
  • Page 25 J7 must be opened. Table 1: Pinout of the phyCORE-Connector X1 __________________ Attention: Because of the LV-Flash devices used the signals A29..A9, D31..D0, /CS0, /OE, /WE0, /WE2 and /HRESET must have signal levels of max. 3.3V +0.5V. © PHYTEC Meßtechnik GmbH 2000 L-523e_2...
  • Page 26 © PHYTEC Meßtechnik GmbH 2000 L-523e_2...

  • Page 27: Jumpers

    Jumpers 3 Jumpers For configuration purposes, the phyCORE-MPC555 has 21 solder jumpers, some of which have been installed prior to delivery. Figure 4 illustrates the numbering of the jumper-pads, while Figure 5 indicates the location of the jumpers on the board.

  • Page 28: Figure 6: Location Of The Jumpers (Soldering Side) And Default-Setting (Standard Version Of The Phycore-Mpc555)

    Figure 6: Location of the jumpers (soldering side) and default-setting (standard version of the phyCORE-MPC555) Jumper J10 and J18 might vary because of different memory on the phyCORE-MPC555. © PHYTEC Meßtechnik GmbH 2000 L-523e_2...
  • Page 29 The Power-Down power supply (VPD) feeds the on-chip SRAM. In the event that there is no +3V3 module input supply , the VPD is provided by the battery input. Package Type 0R in SMD 0402 © PHYTEC Meßtechnik GmbH 2000 L-523e_2...
  • Page 30 Pin 7 enables the activation of a writing protection function. It is not guaranteed that the standard serial memory populating the phyCORE-MPC555 will have this writing protection function. Please refer to the corresponding memory data sheet for precise information.
  • Page 31 The signal /IRTC is connected with the /WAKEUP input. The interrupt output of the RTC is of the open-drain type. /WAKEUP can further be used on the target hardware side (Wired-OR against GND). Package Type 0R in SMD 0402 © PHYTEC Meßtechnik GmbH 2000 L-523e_2...
  • Page 32 For EEPROM- and FRAM memory, VDDL is used, as these memory devices are not volatile The serial memory is supplied with VPD. The serial memory is supplied with VDDL. Package Type 0R in SMD 0402 © PHYTEC Meßtechnik GmbH 2000 L-523e_2...
  • Page 33 0R resistor: Stand-by Package Type SMD 0402 Table 2: Jumper Settings __________________ Jumper J10 and J18 might vary because of different memory on the phyCORE-MPC555 © PHYTEC Meßtechnik GmbH 2000 L-523e_2...
  • Page 34 © PHYTEC Meßtechnik GmbH 2000 L-523e_2...

  • Page 35: Power System And Reset Behavior

    Power System and Reset Behavior 4 Power System and Reset Behavior The phyCORE-MPC555 must be supplied with two different supply voltages: Supply Voltage 1: +3,3 V (VDDL) Supply Voltage 2: +5 V (VDDH) Attention: Both supply voltages are necessary for the correct functioning of the phyCORE-MPC-555.
  • Page 36 /HRESET cycle. Events that do not originate from the MPC555 can also trigger a wake-up. Such events may include an alarm interrupt of the on-board Real-Time Clock (U10, RTC8563) or a low-level at the /WAKEUP port (pin X1C56 of the phyCORE- Connector). © PHYTEC Meßtechnik GmbH 2000 L-523e_2...
  • Page 37 (pin X1D33 connected to pin X1C56). Even if the /IRTC is connected to /WAKEUP, additional input sources may be connected. For additional input sources, a wired-OR-connector (open-drain or open-collector transceiver) against GND is required. © PHYTEC Meßtechnik GmbH 2000 L-523e_2...
  • Page 38 © PHYTEC Meßtechnik GmbH 2000 L-523e_2...

  • Page 39: Start-Up System Configuration

    /IRQ5, /IRQ6, and /IRW7, no external hardware may interfere with these signals. Clock Mode 20 MHz quartz, limp mode activated (MODCK[1..3]=011) 20 MHz quartz, limp mode deactivated (MODCK[1..3]=001) 4 MHz quartz, limp mode activated (MODCK[1..3]=010) © PHYTEC Meßtechnik GmbH 2000 L-523e_2...

  • Page 40: Hard-Rest-Configuration-Word

    If J5 is closed at 2+3 and /HC = 1 (Flash is cleared), then the internal default HRCW 0x00000000 is read. Internal Flash-HRCW (CMFCFIG) If J5 is set at 2+3 and /HC=0, the bit-pattern (CMFCFIG) from the internal Flash is read. © PHYTEC Meßtechnik GmbH 2000 L-523e_2...

  • Page 41: System Memory

    0x0000 0000 (default after Reset) Flash memory with BOOT-Code. 0x0040 0000 The capacity of the external Flash memory depends on the memory 0x0080 0000 populated on the phyCORE-MPC555 0x00C0 0000 0x0100 0000 0x0140 0000 0x0180 0000 0x01C0 0000 Figure 8: Default-Memory Model after Hardware-Reset ©...

  • Page 42: Runtime Memory Model

    OR1= 0xFF80 0000 0x0200 0000 16 MB /CS2 open BR2= 0x0200 XXXX 0x02FF FFFF OR2= 0xFF00 XXXX 0x0300 0000 16 MB /CS3 open. BR3= 0x0200 XXXX 0x03FF FFFF OR3= 0xFF00 XXXX Table 3: Runtime Memory Map © PHYTEC Meßtechnik GmbH 2000 L-523e_2...

  • Page 43: Flash Memory

    Flash technology. Various Flash devices can be used on the phyCORE-MPC555. The Flash memory devices used on the phyCORE-MPC555 operate in 16-bit mode and are organized in 32-bit with. The device at U2 connects to the low data bus while device U3 connects to the high data bus.

  • Page 44: Synchronous Burst-Sram (U4 - U7)

    Use of Flash memory enables in-circuit programming of the module. The Flash devices on the phyCORE-MPC555 are programmable at 3.3V=. Consequently, no dedicated programming voltage is required. As of the printing of this manual, Flash devices generally have a life expectancy of at least 100,000 Erase-/Program-cycles.

  • Page 45: Serial Memory (U8)

    System Memory 6.5 Serial Memory (U8) The phyCORE-MPC555 is populated with a non-volatile memory device with a serial I C interface. This memory serves as storage for configuration data or parameters that must be protected in the event of a Power failure. Various serial memory devices can be installed at U8, including EEPROM, FRAM, or SRAM.

  • Page 46: Figure 9: C Slave-Address Of The Serial Memory

    0xA0/0xA1 0xA4/0xA5 0xA8/0xA9 0xAC/0xAD Table 7: C Address of the Serial memory When selecting the I C slave addresses of the serial memory, please note that not all memory types externalize A1 and A2. © PHYTEC Meßtechnik GmbH 2000 L-523e_2...

  • Page 47: Serial Interfaces

    RDX1_TTL and RXD2_TTL. This is required so that the external transceiver does conflict with the on-board transceiver. The transmit-lines TXD1_TTL / TXD2_TTL can be connected parallel on the transceiver input without causing a collision. © PHYTEC Meßtechnik GmbH 2000 L-523e_2...

  • Page 48: Can Interface

    (A_CNTX0, A_CNRX0) A fast opto-coupler should be implemented to galvanically separate external CAN transceivers and the phyCORE-MPC555. It is recommended to use a Hewlett Packard HCPL06xx or a Toshiba TLP113 fast opto-coupler. Parameters for configuring a proper CAN- bus system are found in the DS102 norms from the CiA (CAN in Automation) User and Manufacturer’s Interest Group.

  • Page 49: Bdm-Debug Interface

    Wiggler, can be attached. Such BDM signal-converters enable connection of the MPC555 to a host-PC for purposes of debugging. This BDM connector is NOT located on the phyCORE-MPC555 module. Instead, these signals are routed out to the specific pins on the Molex connectors aligning the edges of the module (refer to Figure 10).

  • Page 50: Figure 10: 10-Pin Bdm Connector And Corresponding Pins Of The Phycore-Connector

    Figure 10: 10-pin BDM connector and corresponding pins of the phyCORE- Connector The supply voltage of the BDM converter is dependent on the type used. For additional information, please refer to the accompanying data sheet of the converter. © PHYTEC Meßtechnik GmbH 2000 L-523e_2...

  • Page 51: Real-Time Clock Rtc-8563 (U10)

    • Automatic word address incrementing • Programmable alarm, timer and interrupt functions If the phyCORE-MPC555 is equipped with a battery (VBAT), the Real-Time Clock runs independently of the board’s power supply. Programming the Real-Time Clock is done via the I...
  • Page 52 Further information on the Real-Time Clock register can be found in the accompanying RTC data sheet. Attention: After connection of the voltage supply or following a Reset, the Real- Time Clock generates no interrupts, as the clock must first be initialized. © PHYTEC Meßtechnik GmbH 2000 L-523e_2...

  • Page 53: Technical Specifications

    Technical Specifications 9 Technical Specifications The physical dimensions of the phyCORE-MPC555 are represented in Figure 11. 50.6 ø 47.6 ø ø 71.5 ø ø ø Measures are in mm Figure 11: Physical Dimensions © PHYTEC Meßtechnik GmbH 2000 L-523e_2...
  • Page 54 Voltage 5 V = 0 V SRAM in MPC555 Voltage 3.3 V = 0 V Table 8: Technical Data These data apply to the standard configurations at the time of printing of this manual. © PHYTEC Meßtechnik GmbH 2000 L-523e_2...
  • Page 55 Molex connectors. For instance, a 10 mm high Molex connector yields 8 mm of space (10 mm less 2 mm) between the phyCORE-MPC555 and whatever target into which it is integrated by means of the mating Molex connectors.

  • Page 56: Hints For Handling The Module

    Alternatively, a hot air gun can be used to heat and loosen the bonds. Integrating the phyCORE-MPC555 in a Target Hardware Environ- ment Successful integration of the phyCORE-MPC555 in a target hardware layout requires proper precautions regarding sufficient Grounding of the module. For optimum results, the target hardware PCB should include a flat Ground layer.

  • Page 57: Appendices A

    J1 configures D20 and determines the internal or external Flash memory as Bootcode source. The internal default word is read as HRCW Package Type 0R in SMD 0402 © PHYTEC Meßtechnik GmbH 2000 L-523e_2...
  • Page 58 4. The Ready/Busy function on /IRQ5 (MODCK1) is not supported under PCB revision 1169.0. If the /IRQ5 is to be controlled externally over push button S5 of the Development Board PCM-995, then R37 must be removed. © PHYTEC Meßtechnik GmbH 2000 L-523e_2...

  • Page 59: Index

    Power System ......29 external........37 Power-Off Behavior ....30 internal........37 Power-On Behavior....30 FRAM, serial......39 Power-On-Reset ......33 GND pins ........50 quartz ........23, 51 Hard-Rest-Configuration-Word 34 Real-Time Clock .......45 Hints for Handling the Module .50 reference voltage .......24 © PHYTEC Meßtechnik GmbH 2000 L-523e_2...
  • Page 60 Terminating resistor ....42 Serial memory......39 TEXPS........29 SMT-plugs ........7 Solder jumpers ......21 Wake-Up Behavior....30 SPRAM, serial ......39 WAKEUP signal ....25, 31 Start-up System Configuration . 33 supply voltage serial memory ......26 © PHYTEC Meßtechnik GmbH 2000 L-523e_2...
  • Page 61 How would you improve this manual? Did you find any mistakes in this manual? page Submitted by: Customer number: Name: Company: Address: Return to: PHYTEC Technologie Holding AG Postfach 100403 D-55135 Mainz, Germany Fax : +49 (6131) 9221-33 © PHYTEC Meßtechnik GmbH 2000 L-523e_2...
  • Page 62 Published by © PHYTEC Meßtechnik GmbH 2000 Ordering No. L-523e_2 Printed in Germany...