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Hardware Manual Edition May 2009 A product of a PHYTEC Technology Holding company...
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PHYTEC Messtechnik GmbH neither gives any guar- antee nor accepts any liability whatsoever for consequential damages resulting from the use of this manual or its associated product. PHYTEC Messtechnik GmbH reserves the right to alter the information contained herein without prior notification and accepts no responsibility for any damages which might result.
Table of Contents Preface Introduction..................3 1.1 Block Diagram ................6 1.2 View of the phyCORE-TC1796........... 7 Pin Description ..................9 Jumpers....................22 Power System and Reset Behavior ..........30 Power-On-Reset Characteristics ............. 31 System Memory................. 33 6.1 Memory Model following Reset ..........33 6.2 Runtime Memory Model............
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Index of Figures Figure 1: Block Diagram phyCORE-TC1796........... 6 Figure 2: View of the phyCORE-TC1796 (Controller Side) ....7 Figure 3: View of the phyCORE-TC1796 (Connector Side)....8 Figure 4: Pinout of the phyCORE-Connector (view from Connector Side)11 Figure 5: Numbering of the Jumper Pads..........
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The phyCORE-TC1796 is one of a series of PHYTEC Single Board Computers that can be populated with different controllers and, hence, offers various functions and configurations. PHYTEC supports all...
Introduction 1 Introduction The phyCORE-TC1796 belongs to PHYTEC’s phyCORE Single Board Computer module family. The phyCORE SBCs represent the continuous development of PHYTEC Single Board Computer technology. Like its mini-, micro- and nanoMODUL predecessors, the phyCORE boards integrate all core elements of a microcontroller...
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The phyCORE-TC1796 is a subminiature (71,5 x 57) insert-ready Single Board Computer populated with Infineon’s TC1796 Tricore microcontroller. Its universal design enables its insertion in a wide range of embedded applications. All controller signals and ports extend from the controller to high-density pitch (0.635 mm) connectors aligning two sides of the board, allowing it to be plugged like a “big chip”...
(SMT) connectors (0.635 mm) lining two sides of the module (referred to as phyCORE-connector). This allows the phyCORE-TC1796 to be plugged into any target application like a "big chip". A new numbering scheme for the pins on the phyCORE-connector has been introduced with the phyCORE specifications.
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Development Board/user target circuitry. The upper left-hand corner of the numbered matrix (pin 1A) is thus covered with the corner of the phyCORE-TC1796 marked with a white triangle. The numbering scheme is always in relation to the PCB as viewed from above, even if all connector contacts extend to the bottom of the module.
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Pin Description The following figure (Figure 4) illustrates the numbered matrix system. It shows a phyCORE-TC1796 with SMT phyCORE- connectors on its underside. Figure 4: Pinout of the phyCORE-Connector (view from Connector Side) Many of the controller port pins accessible at the connectors along the edges of the board have been assigned alternate functions that can be activated via software.
3 Jumpers For configuration purposes, the phyCORE-TC1796 has 40 solder jumpers, some of which have been installed prior to delivery. Figure 5 illustrates the numbering of the jumper pads, while Figure 6 and indicate the location of the jumpers on the module.
4 Power System and Reset Behavior Operation of the phyCORE-TC1796 requires only one supply voltage. Supply voltage: +3.3 V ± 5 % ( max.: 1200mA ; typ.: 400mA ) Once all voltages have reached their target level the voltage supervisory circuit keeps the /PORST reset signal at low level (low is the active level) for additional 200 ms.
(see System Unit User's Manual for the TC1796, section "Booting Scheme"). Start Address following Power-On-Reset On the phyCORE-TC1796 configuration of two Start addresses after Power-On-Reset is done by using the DIP-switch (S1). Selection between these two pre-configured start addresses is possible...
6.1 Memory Model following Reset The internal Chip Select logic provided by the TC1796 controller is used exclusively on the phyCORE-TC1796. Hence the memory model as described in the TC1796 User's Manual is valid after reset. 6.2 Runtime Memory Model The runtime memory model is configured via software using the internal registers of the TC1796.
System Memory 6.3 Flash Memory Use of Flash as non-volatile memory on the phyCORE-TC1796 provides an easily reprogrammable means of code storage. The Flash memory operates in 16-bit mode and has 32-bit organization on the module. The phyCORE-TC1796 offers the option of populating up to 64 MByte Flash at U3 and U4.
TxD line of the COM port; while the TxD0 line is connected to the RxD line of the COM port. The Ground potential of the phyCORE-TC1796 circuitry needs to be connected to the applicable Ground pin on the COM port as well.
7.2 CAN Interface The phyCORE-TC1796 is designed to house four CAN transceivers at U7, U8, U9 and U10 (SN65HVD23x). The CAN bus transceiver devices support signal conversion of the CAN transmit (CANTx) and receive (CANRx) lines. The CAN transceiver supports up to 120 nodes on a single CAN bus.
IP number to the hardware's MAC address. In order to guarantee that the MAC address is unique, all addresses are managed in a central location. PHYTEC has acquired a pool of MAC addresses. The MAC address of the phyCORE-TC1796 is located on the bar code sticker attached to the module.
Buses on the phyCORE-connector at X3C31, X3D32 (SCL0, SDA0) and X3C25, X3C24 (SCL1, SDA1) The two IIC-BUS Master Controller on the phyCORE-TC1796 are both controlled by the Microcontroller’s SSC0 interface. The slave select for the first (U11) IIC Interface controller (SCL0,...
SPI Memory, EEPROM / FLASH (U13) The phyCORE-TC1796 features a non-volatile memory with an SPI interface. This memory can be used for storage of configuration data or operating parameters, that must not be lost in the event of a power interruption.
• 24-hour format • Automatic word address incrementing • Programmable alarm, timer and interrupt functions If the phyCORE-TC1796 is supplied with a +3VDC voltage at Pin X3C6C (VBAT_IN), the Real-Time Clock runs independently of the board’s power supply. Programming the Real-Time Clock is done via the first IIC (U11) Interface controller (SCL0, SDA0).
In some applications it is desirable to disconnect all supply voltages from the module, but still maintain certain data in the volatile memory. For such cases the phyCORE-TC1796 offers the input pin VBAT_IN (X3C6). If a voltage of 3.1 V is supplied over VBAT, then the data is...
Technical Specification 14 microSD-card slot X4 The phyCORE-TC1796 features a microSD Card slot. The microSD is connected to the Microcontroller’s SSC1 interface. using SLSO7 (SSC Slave Select Output 7) for the microSD Furthermore Port Pin input P1.14 is used to as card detect input.
15 Technical Specifications The physical dimensions of the phyCORE-TC1796 are represented in Figure 9. The module's profile is ca. 7 mm thick, with a maximum component height of 2 mm on the backside of the PCB and approximately 3 mm on the top side. The board itself is approximately 2 mm thick.
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Two different heights are offered for the receptacle sockets that correspond to the connectors populating the underside of the phyCORE-TC1796. The given connector height indicates the distance between the two connected PCBs when the module is mounted on the corresponding carrier board. In order to get the exact spacing, the maximum component height (2 mm) on the underside of the phyCORE must be subtracted.
Hints for Handling the Module 16 Hints for Handling the phyCORE-TC1796 Removal of components is not advisable given the compact nature of the module. Should this nonetheless be necessary, please ensure that the board as well as surrounding components and sockets remain undamaged while desoldering.
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