Analog Devices SCP-LT8362-I-EVALZ Demo Manual page 3

CONFIGURATION SETTINGS
Demonstration circuit SCP-LT8362-I-EVALZ features the
LT8362 in a Cuk configuration. It operates with a switching
frequency of 2MHz and is designed to convert a 4.5V to
42V source to –15V, with up to 1A output current (depend-
ing on input voltage).
The output of the SCP-LT8362-I-EVALZ is resistor-pro-
grammable from –5V to –40V. The board can be also con-
figured to drive VIOC-capable LDO regulators.
OUTPUT VOLTAGE PROGRAMMING
⎛ ⎞
R6
−0 .8 0 V 1 +
⎝ ⎜ ⎠ ⎟
FBX
R8
Table 2. Resistor Selection Guide for Common Output Voltages
V (V)
OUT
–5.0
–6.0
–7.0
–8.0
–9.0
–10.0
–11.0
–12.0
–13.0
–14.0
–15.0
–16.0
–17.0
–18.0
–19.0
–20.0
–21.0
–22.0
–23.0
–24.0
–25.0
–30.0
–35.0
–40.0
DEMO MANUAL SCP-LT8362-I-EVALZ
R6 (Ω) R8 (Ω)
105K 20.0K
71.5K 11.0K
78.7K 10.2K
102K 11.3K
205K 20.0K
115K 10.0K
255K 20.0K
140K 10.0K
210K 13.7K
165K 10.0K
442K 24.9K
215K 11.3K
232K 11.5K
215K 10.0K
232K 10.2K
255K 10.7K
232K 10.2K
255K 10.7K
383K 13.7K
309K 10.7K
357K 11.8K
365K 10.0K
590K 13.7K
487K 10.0K
EN/UVLO PIN CONFIGURATION
The EN/UVLO pin is tied to the optional SCP Run/Se-
quence header P1. To create a harness for this function,
use Molex part # 0510650300 with crimp pin # 50212-
8000.
To use an active run signal, use a 1.00M for either pull-up
or pull-down resistors R1 and R3, short R13 with 0W, and
use the drive signal from connector P1.
If precision UVLO operation is desired, program enable di-
vider R and R such that:
5 6
R6 = 1 0 k − 1 0 0 k, n o min al
⎛ V − 1 .6 0 V ⎞
IN TH
R5 = R6
⎝ ⎜ ⎠ ⎟
1 .6 0 V
TH
The LT8330 has an accurate 1.60V threshold which places
the part into under voltage lockout. The hysteresis thresh-
old on the rising edge is typically 80mV and scales by the
factor:
R5 + R6
= 80mV
V
HYST
R6
VOLTAGE INPUT-TO-OUTPUT CONTROL (VIOC)
IMPLEMENTATION
To implement the VIOC function for this regulator, set R27
to 0W. Refer to the "Configuration Settings" section in the
Demo Manual for the LDO board and use the following
configuration for this board.
Table 3. VIOC Cross-Reference Designators
VIOC SETTING REFERENCES
V Reference Designators
OUT
V − V = V = −0 .8 0 V
L DOIN L DOOUT VIOC
⎛
R
BOT
V = −0 .8 0 V
( )
⎝ ⎜
FB
MAX LDOIN
The VIOC pin is designed to sink current only, and only
sources via its internal 40k impedance to ground.
R R R
BOT TOP MAX
R8 R6 R14
⎛ ⎞
+ R
R
BOT TOP
⎝ ⎜ ⎠ ⎟
FB
R
BOT
⎞
+ R + R
⎛ V ⎞
TOP MAX VIOC
+ R
⎝ ⎜ ⎠ ⎟
⎠ ⎟
R 4 0 K
BOT
MAX
Rev. 0
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