Nuvoton NuMicro MA35D0 Series User Manual

Arm cortex-a35-based microprocessor

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MA35D0 BSP

NuMicro

Family

Arm

Cortex

-A35-based Microprocessor

MA35D0 BSP

User Manual

The information described in this document is the exclusive intellectual property of

Nuvoton Technology Corporation and shall not be reproduced without permission from Nuvoton.

Nuvoton is providing this document only for reference purposes of NuMicro

microcontroller and

microprocessor based system design. Nuvoton assumes no responsibility for errors or omissions.

All data and specifications are subject to change without notice.

For additional information or questions, please contact: Nuvoton Technology Corporation.

www.nuvoton.com

May 06, 2024

Page 1 of 24

Rev 1.00

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Summary of Contents for Nuvoton NuMicro MA35D0 Series

Page 1 MA35D0 BSP User Manual The information described in this document is the exclusive intellectual property of Nuvoton Technology Corporation and shall not be reproduced without permission from Nuvoton. ® Nuvoton is providing this document only for reference purposes of NuMicro microcontroller and microprocessor based system design.
Page 2 MA35D0 BSP Table of Contents 1 OVERVIEW ...................... 3 2 BSP FEATURES ....................4 2.1 Supported Platforms ..................... 4 2.2 BSP Contents ......................... 4 2.3 Repositories ........................5 3 DEVELOPMENT BOARD SETUP ..............6 3.1 Power on Setting ......................6 3.2 Hardware Connection ....................
Page 3 MA35D0 BSP OVERVIEW The MA35D0 series microprocessor is based on a poweful Armv8-A architecture dual-core ARM ® Cortex-A35 with TrustZone , which features 32 KB I-cache, 32 KB D-cache, and 512 KB L2 Cache. The internal 64/32-bit CPU core operates up to 650 MHz supporting secure boot. This document introduces the MA35D0 board supporting package (BSP).
Page 4 MA35D0 BSP BSP FEATURES This BSP supports Linux operating system for MA35D0. The peripheral drivers are also included in the BSP allowing applications to access them. The image reside at EL3 as secure monitor is BL31 from Trusted Firmware-A (TF-A), which is included. And this BSP includes OP-TEE to provide the secure service provided in secure EL1.
Page 5 MA35D0 BSP Table 2-1 BSP Content List Repositories The following lists the repositories holds the MA35D0 BSP source code. Users can use git command to clone the source to their local directory. Component Yocto https://github.com/OpenNuvoton/MA35D1_Yocto-v3.1.3 Buildroot https://github.com/OpenNuvoton/MA35D1_Buildroot.git Linux https://github.com/OpenNuvoton/MA35D1_linux-5.10.y.git U-Boot https://github.com/OpenNuvoton/MA35D1_u-boot-v2020.07.git OP-TEE https://github.com/OpenNuvoton/MA35D1_optee_os-v3.9.0.git...
Page 6 MA35D0 BSP DEVELOPMENT BOARD SETUP Power on Setting There are several boot options can be decided by power on setting of MA35D0. For example, the boot source, ECC bit to use, SD interface selection, etc. Table 3-1 lists the power on setting for MA35D0. The power on setting should be set according to the boot scenario desired before reset or power on the system.
Page 7 MA35D0 BSP Hardware Connection All boards manufactured by Nuvoton come alone with two USB device ports. One for download firmware and the other is VCOM for debugging. NuWriter tool comes alone with GUI and command line interface provided for firmware download. Please refer to...
Page 8 MA35D0 BSP Figure 3-2 Setup Serial Port Figure 3-3 Select Port Number For engineers to develop on a native Linux machine where, Putty could be an alternative for Tera Term which does not support Linux platform. To use putty, first launch it and select the connection interface.
Page 9 MA35D0 BSP Figure 3-4 Select Connection May 06, 2024 Page 9 of 24 Rev 1.00...
Page 10 Some of the platforms provide JTAG interface which could be used to debug Cortex-A35. This is a 20- pin socket with fool-proof connector on NuMaker-IOT-MA35D03F80 board as shown in Figure 3-6. Users could use Nuvoton Nu-Link2 Pro, J&D Tech CodeViser, or other debugger supports CoreSight SoC-400.
Page 11 MA35D0 BSP Figure 3-6 ICE Interface Please note that JTAG pins and I2S0 share multi-function pins on the NuMaker-IOT-MA35D03F80 board. These pins are switched to I2S0 usage. If you want to use JTAG ICE, you must desolder the several 0-ohm resistors R44 to R48 and solder 0-ohm resistors onto positions R368 to R372. May 06, 2024 Page 11 of 24 Rev 1.00...
Page 12 MA35D0 BSP DEVELOPMENT ENVIRONMENT SETUP This section describes the steps to build up the BSP dev elopement environment without using Yocto or Buildroot. Please refer to MA35D0 Yocto User Manual MA35D0 Buildroot User Manual for setting up the development environment using Yocto or Buildroot. Linux Development Environment The development environment in based on Linux system.
Page 13 MA35D0 BSP Figure 4-2 Linaro Tool Chain Download Selection BSP Installation The MA35D0 supports Yocto project and Buildroot. Both include the MA35D0 TF-A, U-Boot, Linux kernel, OP-TEE, and can build images for booting from the MA35D0 SD0, SD1, SPI Flash, or NAND Flash.
Page 14 Power-On-Setting and OTP. To setup an USB connection between MA35D0 and computer, Nuvoton provides a tool named NuWriter. This tool first loads a system initial firmware to MA35D0, and then send a second firmware named xusb.bin to take over the USB connection and storage access on MA35D0 after the system initial firmware finish execution.
Page 15 MA35D0 BSP Start USBD USB boot USBH Initial USB Host Initial USB Device EHCI Connect to Read header 0 (sector 2) Read header 1 (sector 3) Download DDR Initial DRAM Check header fail match Download xusb.bin SD backup (update firmware) to Load new header enabled DRAM...
Page 16 MA35D0 BSP Start Enable NAND Page size 2KB + 64 ECC–BCH8 Read ONFI ONFI supported? Get NAND Device ID Supported ID? Ignore outside setting? (page size / ECC) Use outside setting Set Page size Set ECC Read header 0 (block 0~3) Read header 1 (block 0~3) Check header...
Page 17 MA35D0 BSP Boot from SPI NAND Flash The MA35D0 supports booting from SPI NAND Flash using QSPI0 interface. Compared to parallel NAND Flash, SPI NAND uses less pins to connect with microprocessors. So microprocessors can save the pins for other purpose. Depending on the Power-On-Setting and OTP, IBR can set the SPI clock to 50 MHz or 30 MHz and read data from SPI Flash using 1-bit mode or quad mode.
Page 18 MA35D0 BSP Start Enable QSPI clock Set 1-bit MFP Set QSPI clock (OTP) QSPI control setting Reset NAND (0xff) busy Read header 0 (block 0~3) ready one page data Get status Read 512 bytes (0xf) Read header 1 (block 0~3) one page data Check R/B# status Read 512 bytes...
Page 19 MA35D0 BSP Start Enable QSPI clock Set 1-bit MFP Set QSPI clock (OTP) QSPI control setting Read header 0 (offset 0) 512 bytes by 1-bit mode Read header 1 (offset 0x1000) 512 bytes by 1-bit mode Check header fail match Load new header 4-bit mode images...
Page 20 MA35D0 BSP Start SDH boot Enable SD0 clock Enable SD1 clock Set SD0 MFP Set SD1 MFP Set SD0 clock to 200kHz Set SD1 clock to 200kHz Configure SD0 Configure SD1 Is SDHC / SD / eMMC? Set SD clock to 20MHz SD0 setting (data width, Unknown block size)
Page 21 MA35D0 BSP BOOTING PREBUILD IMAGES The MA35D0 BSP contains pre-built images for different hardware. Please refer to this section for the procedures to load prebuild images to different hardware and bring up the system. NuMake-IOT Board The MA35D0 NuMaker-IOT-MA35D03F80 board supports booting from several storage devices. Each boot source required different images to bring up the system.
Page 22 MA35D0 BSP for NAND Flash boot. This file is put at buildroot/output/images directory. May 06, 2024 Page 22 of 24 Rev 1.00...
Page 23 MA35D0 BSP REVISION HISTORY Date Revision Description ⚫ 2024.05.06 1.00 Initial version. May 06, 2024 Page 23 of 24 Rev 1.00...
Page 24 MA35D0 BSP Important Notice Nuvoton Products are neither intended nor warranted for usage in systems or equipment, any malfunction or failure of which may cause loss of human life, bodily injury or severe property damage. Such applications are deemed, “Insecure Usage”.

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