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Infineon TRAVEO T2G CYT2 Series Manual
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Infineon TRAVEO T2G CYT2 Series Manual

Infineon TRAVEO T2G CYT2 Series Manual

Low-power mode procedure
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AN220222
Low-power mode procedure in TRAVEO
T2G family
™
About this document
Scope and purpose
This application note describes the features of low-power modes in TRAVEO
T2G family MCUs and explains
™
how to enter low-power modes and return to active mode.
Intended audience
This document is intended for anyone who uses the Infineon TRAVEO
T2G MCUs for using low-power mode.
™
Associated part family
TRAVEO
T2G family CYT2/CYT3/CYT4/CYT6 series.
™
Application note
Please read the sections "Important notice" and "Warnings" at the end of this document
002-20222 Rev. *G
www.infineon.com
2024-12-17

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Summary of Contents for Infineon TRAVEO T2G CYT2 Series

  • Page 1 T2G family MCUs and explains ™ how to enter low-power modes and return to active mode. Intended audience This document is intended for anyone who uses the Infineon TRAVEO T2G MCUs for using low-power mode. ™ Associated part family TRAVEO T2G family CYT2/CYT3/CYT4/CYT6 series.
  • Page 2 Low-power mode procedure in TRAVEO T2G family ™ Table of contents Table of contents About this document ..............1 Table of contents .
  • Page 3 Low-power mode procedure in TRAVEO T2G family ™ 1 Introduction Introduction ® ® This application note describes low-power modes in TRAVEO T2G family MCU. The series includes Arm Cortex ™ CPUs, CAN FD, memory, and analog and digital peripheral functions in a single chip. ®...
  • Page 4 Low-power mode procedure in TRAVEO T2G family ™ 2 Power modes of TRAVEO T2G family ™ Power modes of TRAVEO T2G family ™ TRAVEO T2G family MCUs have the following power modes: ™ • Active mode: All peripherals are available. •...
  • Page 5 Low-power mode procedure in TRAVEO T2G family ™ 2 Power modes of TRAVEO T2G family ™ Table 1 TRAVEO T2G power modes ™ Power mode Description Entry condition Wakeup source Wakeup action Active Primary mode of Wake up from Sleep/ Not applicable Not applicable operation;...
  • Page 6 Low-power mode procedure in TRAVEO T2G family ™ 3 Power modes transition Power modes transition This section describes how to use low-power mode procedure using the sample driver library (SDL). The code snippets in this application note are part of SDL. See Other references for the SDL.
  • Page 7 Low-power mode procedure in TRAVEO T2G family ™ 3 Power modes transition 3.1.1 RESET/OFF state • OFF state: Represents the state with no power applied Go to RESET, when powered up above power-on reset level (POR event) • RESET state: Detected reset event: POR, external reset (XRES), or internal reset Go to Active mode after reset sequence completion IMO is started...
  • Page 8 Low-power mode procedure in TRAVEO T2G family ™ 3 Power modes transition Table 2 (continued) Low-power mode transitions Initial state Final state Trigger Hardware actions Active DeepSleep Firmware action CPU enters low-power mode. Perform these steps to enter DeepSleep mode High-frequency clocks (LPM_READY bit [5] of the PWR_CTL register are shut down.
  • Page 9 Low-power mode procedure in TRAVEO T2G family ™ 3 Power modes transition Table 2 (continued) Low-power mode transitions Initial state Final state Trigger Hardware actions Active Hibernate Firmware action CPU enters low-power mode. Set TOKEN bits [7:0] of the Both high-frequency and PWR_HIBERNATE register (optional) low-frequency clocks are and PWR_HIB_DATA register to some...
  • Page 10 Low-power mode procedure in TRAVEO T2G family ™ 3 Power modes transition Table 2 (continued) Low-power mode transitions Initial state Final state Trigger Hardware actions Sleep DeepSleep When the debugger is not connected and High-frequency clocks DeepSleep mode is triggered, but are shut down.
  • Page 11 Low-power mode procedure in TRAVEO T2G family ™ 3 Power modes transition Figure 4 shows the software and hardware operation for the transition from Active mode to Hibernate mode. Software operation Start (Active) Hardware operation Set PWR_HIBERNATE:FREEZE=1 Disable Overrides CPU enters the Hibernate mode by performing three identical writes to the Write PWR_HIBERNATE: PWR_HIBERNATE register.
  • Page 12 Low-power mode procedure in TRAVEO T2G family ™ 3 Power modes transition Table 3 Wakeup action Initial state Final state Trigger source Hardware action Sleep Active Any enabled interrupt in Sleep mode CPU exits Sleep mode and executes the interrupt DeepSleep Active Any enabled interrupt in DeepSleep...
  • Page 13 Low-power mode procedure in TRAVEO T2G family ™ 3 Power modes transition Software operation Start (DeepSleep) Interrupt Hardware operation Turn ON Active Reference and Core Regulator (if used). Turn ON Main Logic Domain Switches. Enable IMO. Wait until Regulator Indicates Supply is Good Short Remaining LV Supplies Together Retention Disabled...
  • Page 14 Low-power mode procedure in TRAVEO T2G family ™ 3 Power modes transition Table 4 List of PCLK (example of the TCPWM timer) settings parameters Power Basic WDT MCWDT Remarks mode Subcounter0 Subcounter1 Subcounter2 Active Reset Reset , interrupt , and FAULT Interrupt In Active mode, the interrupt...
  • Page 15 Low-power mode procedure in TRAVEO T2G family ™ 3 Power modes transition 3.2.2 Example of WDT wakeup operation Figure 6 shows an example of the operation with Subcounter0/1 of MCWDT. In this example, Subcounter0 of MCWDT is used as a supervisor of an unexpected software execution path, and Subcounter1 of MCWDT is used as a periodic wakeup interrupt generator during low-power mode.
  • Page 16 Low-power mode procedure in TRAVEO T2G family ™ 3 Power modes transition Subcounter1 continues counting upwards during low-power mode. If counter value reaches the setting value of “WARN_LIMIT”, MCU wakes up from low-power mode. If AUTO_SERVICE setting is used, hardware resets the counter value.
  • Page 17 Low-power mode procedure in TRAVEO T2G family ™ 3 Power modes transition Table 5 (continued) List of WDT settings during low-power modes configuration parameters Parameters Description Value .c1AutoService Configure to automatically clear MCWDT CY_MCWDT_ENABLE when Subcounter1 value reaches WARN_LIMIT .c1SleepDeepPause Enable to pause Subcounter1 when the CY_MCWDT_DISABLE corresponding CPU is in DeepSleep .c1DebugRun...
  • Page 18 Low-power mode procedure in TRAVEO T2G family ™ 3 Power modes transition The following description will help you understand the register notation of the driver part of SDL: • Base signifies the pointer to the MCWDT register base address. Counters specify the Subcounter within the MCWDT.
  • Page 19 Low-power mode procedure in TRAVEO T2G family ™ 3 Power modes transition Code Listing 1 Example to WDT wakeup operation in power mode transition main(void) Cy_SysInt_SetSystemIrqVector(srss_interrupt_mcwdt_1_IRQn, irqMCWDT1Handler); /*Assign MCWDT interrupt*/ /*MCWDT configuration See (a) of Figure Code Listing Code Listing Code Listing Code Listing Code Listing...
  • Page 20 Low-power mode procedure in TRAVEO T2G family ™ 3 Power modes transition Code Listing 2 MCWDT configuration * \var cy_stc_mcwdt_config_t mcwdtConfig * \brief MCWDT configuration cy_stc_mcwdt_config_t mcwdtConfig /*Configure MCWDT parameter*/ .coreSelect CY_MCWDT_PAUSED_BY_NO_CORE, .c0LowerLimit 0ul, .c0UpperLimit 0xFFFFul, .c0WarnLimit MCWDT_TICKS_PER_SECOND, /* 1 sec, ignored */ .c0LowerAction CY_MCWDT_ACTION_FAULT_THEN_RESET, .c0UpperAction...
  • Page 21 Low-power mode procedure in TRAVEO T2G family ™ 3 Power modes transition Code Listing 3 Cy_MCWDT_DeInit() function /* De-initializes the MCWDT block, returns register values to their default state./* void Cy_MCWDT_DeInit(volatile stc_MCWDT_t *base) Cy_MCWDT_Unlock(base); // disable all counter for(uint32_t loop = 0ul; loop < CY_MCWDT_NUM_OF_SUBCOUNTER; loop++) base->CTR[loop].unCTL.u32Register = 0ul;...
  • Page 22 Low-power mode procedure in TRAVEO T2G family ™ 3 Power modes transition Code Listing 4 Cy_MCWDT_Init() function /* Initializes the MCWDT block.*/ cy_en_mcwdt_status_t Cy_MCWDT_Init(volatile stc_MCWDT_t *base, cy_stc_mcwdt_config_t const *config) cy_en_mcwdt_status_t ret CY_MCWDT_BAD_PARAM; ((base NULL) && (config NULL)) Cy_MCWDT_Unlock(base); un_MCWDT_CTR_CONFIG_t tempConfigParams un_MCWDT_CTR2_CONFIG_t tempCNT2ConfigParams base->unCPU_SELECT.u32Register config->coreSelect;...
  • Page 23 Low-power mode procedure in TRAVEO T2G family ™ 3 Power modes transition Code Listing 5 Cy_MCWDT_Unlock() function /* Unlocks the MCWDT configuration registers.*/ STATIC_INLINE void Cy_MCWDT_Unlock(volatile stc_MCWDT_t *base) uint32_t interruptState; interruptState Cy_SysLib_EnterCriticalSection(); base->unLOCK.stcField.u2MCWDT_LOCK CY_MCWDT_LOCK_CLR0; base->unLOCK.stcField.u2MCWDT_LOCK CY_MCWDT_LOCK_CLR1; Cy_SysLib_ExitCriticalSection(interruptState); Code Listing 6 Cy_MCWDT_SetInterruptMask() function /* Writes MCWDT interrupt mask register.*/ __STATIC_INLINE void Cy_MCWDT_SetInterruptMask(volatile stc_MCWDT_t *base,...
  • Page 24 Low-power mode procedure in TRAVEO T2G family ™ 3 Power modes transition Code Listing 7 Cy_MCWDT_Enable() function /* Enables all specified counters. */ __STATIC_INLINE void Cy_MCWDT_Enable(volatile stc_MCWDT_t *base, uint32_t counters, uint16_t waitUs) (counters & CY_MCWDT_CTR0) base->CTR[0].unCTL.stcField.u1ENABLE 1ul; (counters & CY_MCWDT_CTR1) base->CTR[1].unCTL.stcField.u1ENABLE 1ul;...
  • Page 25 Low-power mode procedure in TRAVEO T2G family ™ 3 Power modes transition Code Listing 10 Cy_SysPm_DeepSleep() function /* Sets a CPU core to the DeepSleep mode */ cy_en_syspm_status_t Cy_SysPm_DeepSleep(cy_en_syspm_waitfor_t waitFor) uint32_t interruptState; cy_en_syspm_status_t retVal CY_SYSPM_SUCCESS; /* Call the registered callback functions with * the CY_SYSPM_CHECK_READY parameter.
  • Page 26 Low-power mode procedure in TRAVEO T2G family ™ 3 Power modes transition if(waitFor CY_SYSPM_WAIT_FOR_EVENT) __WFI(); else __WFE(); while (0); //rmkn _FLD2VAL(CPUSS_CM4_PWR_CTL_PWR_MODE, CPUSS- >unCM4_PWR_CTL.u32Register) == CY_SYSPM_CM4_PWR_CTL_PWR_MODE_RETAINED); #endif /* (0u != CY_CPU_CORTEX_M0P) */ Cy_SysLib_ExitCriticalSection(interruptState); /* Call the registered callback functions with the CY_SYSPM_AFTER_TRANSITION parameter.
  • Page 27 Low-power mode procedure in TRAVEO T2G family ™ 3 Power modes transition Sensor Wakeup GPIO Output External Sensors Sensor Device Sensor Sensor Sensor TRAVEO™ T2G Family MCU Analog input Block Diagram of TRAVEO™ T2G Wakeup Interrupt/ Interrupt Output Digital Output GPIO Control Driver...
  • Page 28 Low-power mode procedure in TRAVEO T2G family ™ 3 Power modes transition Power supply current Active Active Mode Mode Low-power Low-power Low-power Reset Active Active Active mode mode mode DeepSleep DeepSleep Time Reset Active DeepSleep Active DeepSleep Active Start Wakeup Re-start Wakeup Event Generator...
  • Page 29 Low-power mode procedure in TRAVEO T2G family ™ 3 Power modes transition 3.3.3 Flowchart of cyclic wakeup operation Software operation Start Hardware operation ADC configuration - Group configuration - Trigger selection (EVTGEN) - Sampling time per channel - Range detect mode per channel EVTGEN (32 kHz) configuration - Wakeup time (COMP1) - ADC trigger timing (COMP0)
  • Page 30 Low-power mode procedure in TRAVEO T2G family ™ 3 Power modes transition Table 7 (continued) List of cyclic wakeup operation configuration parameters Parameters Description Value .functionalitySelection Event generator select CY_EVTGEN_DEEPSLEEP_FUNCTIONALITY functionality .triggerOutEdge Event generator trigger CY_EVTGEN_EDGE_SENSITIVE .valueDeepSleepComparator Wakes up the CPU after time 1000000 (1 sec) .valueActiveComparator Triggers ADC after time...
  • Page 31 Low-power mode procedure in TRAVEO T2G family ™ 3 Power modes transition Code Listing 11 Example of cyclic wakeup operation /* Eventgenerator Configration */ const cy_stc_evtgen_config_t evtgenTestConfig #else .frequencyRef 8000000, clk_ref = clk_hf1 .frequencyLf 32000, // clk_lf = 32,000 for silicon #endif .frequencyTick 1000000,...
  • Page 32 Low-power mode procedure in TRAVEO T2G family ™ 3 Power modes transition Deinitialize peripherals /*******************************************/ Cy_Evtgen_DeinitializeCompStruct(EVTGEN0, 0); /* See Code Listing 13 Cy_Evtgen_Deinitialize(EVTGEN0); /* See Code Listing 14 /*******************************************/ Initialize and start Event generator /*******************************************/ Cy_Evtgen_Initialize(EVTGEN0,&evtgenTestConfig); /* See Code Listing 15 /*******************************************/ Initialize comparator structure 0 /*******************************************/...
  • Page 33 Low-power mode procedure in TRAVEO T2G family ™ 3 Power modes transition Code Listing 13 Cy_Evtgen_DeinitializeCompStruct() function void Cy_Evtgen_DeinitializeCompStruct(volatile stc_EVTGEN_t *base, uint8_t structNum) /* Deinitialize event generator structure */ base->COMP_STRUCT[structNum].unCOMP_CTL.u32Register base->COMP_STRUCT[structNum].unCOMP0.stcField.u32INT32 base->COMP_STRUCT[structNum].unCOMP1.stcField.u32INT32 evtgenContext[structNum] NULL; Code Listing 14 Cy_Evtgen_Deinitialize() function void Cy_Evtgen_Deinitialize(volatile stc_EVTGEN_t *base) /* Deinitialize event generator */ base->unCTL.u32Register...
  • Page 34 Low-power mode procedure in TRAVEO T2G family ™ 3 Power modes transition Code Listing 15 Cy_Evtgen_Initialize() function cy_en_evtgendrv_status_t Cy_Evtgen_Initialize(volatile stc_EVTGEN_t *base, const cy_stc_evtgen_config_t* config) /* Initialize the event generator */ uint16_t refDiv; un_EVTGEN_RATIO_CTL_t ratioCtl; /* 1. Checking input parameter valid */ if(config NULL) return...
  • Page 35 Low-power mode procedure in TRAVEO T2G family ™ 3 Power modes transition /* SW controll: valid bit should be set manually. */ base->unRATIO_CTL.stcField.u1VALID /* Set VALID bit */ else /* HW controll: */ ratioCtl.u32Register base->unRATIO_CTL.u32Register; ratioCtl.stcField.u1DYNAMIC /* Set Dynamic bit */ ratioCtl.stcField.u3DYNAMIC_MODE config->ratioValueDynamicMode;...
  • Page 36 Low-power mode procedure in TRAVEO T2G family ™ 3 Power modes transition Code Listing 16 Cy_Evtgen_InitializeCompStruct() function cy_en_evtgendrv_status_t Cy_Evtgen_InitializeCompStruct(volatile stc_EVTGEN_t *base, uint8_t structNum, const cy_stc_evtgen_struct_config_t* configStruct, cy_stc_evtgen_struct_context_t* context) /* Initialize a comparator structure */ un_EVTGEN_COMP_STRUCT_COMP_CTL_t compCtr; uint64_t tempCounterValue; uint32_t savedIntrStatus; /* Checking input parameter valid */ if(configStruct NULL)
  • Page 37 Low-power mode procedure in TRAVEO T2G family ™ 3 Power modes transition tempCounterValue (uint64_t)Cy_Evtgen_GetCounterValue(base); /* Setting active comparator value */ base->COMP_STRUCT[structNum].unCOMP0.stcField.u32INT32 (uint32_t)(tempCounterValue (uint64_t)configStruct->valueActiveComparator); /* Setting deep sleep comparator value */ if(configStruct->functionalitySelection CY_EVTGEN_DEEPSLEEP_FUNCTIONALITY) base->COMP_STRUCT[structNum].unCOMP1.stcField.u32INT32 (uint32_t)(tempCounterValue (uint64_t)configStruct->valueDeepSleepComparator); Cy_SysLib_ExitCriticalSection(savedIntrStatus); /* Setting comparator struct controll parameter */ base->COMP_STRUCT[structNum].unCOMP_CTL.u32Register compCtr.u32Register;...
  • Page 38 Low-power mode procedure in TRAVEO T2G family ™ 3 Power modes transition Code Listing 17 Cy_SysPm_DeepSleep() function cy_en_syspm_status_t Cy_SysPm_DeepSleep(cy_en_syspm_waitfor_t waitFor) /* Sets a CPU core to the DeepSleep mode */ uint32_t interruptState; cy_en_syspm_status_t retVal CY_SYSPM_SUCCESS; /* Call the registered callback functions with * the CY_SYSPM_CHECK_READY parameter.
  • Page 39 Low-power mode procedure in TRAVEO T2G family ™ 3 Power modes transition if(waitFor CY_SYSPM_WAIT_FOR_EVENT) __WFI(); else __WFE(); while (0); //rmkn _FLD2VAL(CPUSS_CM4_PWR_CTL_PWR_MODE, CPUSS- >unCM4_PWR_CTL.u32Register) == CY_SYSPM_CM4_PWR_CTL_PWR_MODE_RETAINED); #endif /* (0u != CY_CPU_CORTEX_M0P) */ Cy_SysLib_ExitCriticalSection(interruptState); /* Call the registered callback functions with the CY_SYSPM_AFTER_TRANSITION parameter.
  • Page 40 Low-power mode procedure in TRAVEO T2G family ™ 3 Power modes transition As described in the beginning of the cyclic wakeup operation section, cyclic wakeup is intended to minimize the average power consumption in an application. This average consumption current is affected by the following: •...
  • Page 41 Low-power mode procedure in TRAVEO T2G family ™ 3 Power modes transition Power supply current Cyclic Wakeup period DeepSleep time LPACTIVE time Low-power Low-power Active Active Time DeepSleep AD Converter Convert Convert Smart I/O Config Config uration uration CPU turns GPIOs off after ADC Sensors GPIO Signal...
  • Page 42 Low-power mode procedure in TRAVEO T2G family ™ 3 Power modes transition Figure 12 Operation of sensor activation circuitry In this use case, the circuitry receives one signal from HSIOM named the “sensor_io_clr” signal, with active HIGH, which is used to clear the output of LUT3[1], i.e., the sensor activation output. The following I/O port and HSIOM signal are used: •...
  • Page 43 Low-power mode procedure in TRAVEO T2G family ™ 3 Power modes transition constant 0 Smart I/O, Internal Logic Smart I/O, internal logic Clock & Clock & DATA.DATA clk_fabric clk_block Reset reset clk_smartio Data Unit Data unit clk_fabric clk_block clk_sys clk_lf Sync Sync io_data_in[ 7]...
  • Page 44 Low-power mode procedure in TRAVEO T2G family ™ 3 Power modes transition Table 10 (continued) Lookup table LUT3 [1] Tr2_in Tr1_in Tr0_in Tr_out LUT3[1] out LUT3[0] out DU tr_out   Table 11 Lookup table LUT3 [2] Tr2_in Tr1_in Tr0_in Tr_out LUT3[1] out LUT3[0] out DU tr_out...
  • Page 45 Low-power mode procedure in TRAVEO T2G family ™ 3 Power modes transition Therefore, you can configure DAT1 and DAT0 (usually set to ‘0’) to satisfy the sensor stabilization waiting time as in the rough estimation as follows: delay =  T −...
  • Page 46 Low-power mode procedure in TRAVEO T2G family ™ 3 Power modes transition Power supply current Cyclic Wakeup duration Cyclic Wakeup period LPACTIVE DeepSleep time time Active Active Mode Mode Low-power Low-power Low-power Active Active Active mode mode mode DeepSleep DeepSleep Time ADC conversion result out of range.
  • Page 47 Low-power mode procedure in TRAVEO T2G family ™ 3 Power modes transition Note: The gray box in the flowchart indicates a hardware operation. Therefore, processing with software is not required. The GPIO is activated by smart I/O while the CPU is still in DeepSleep mode and the sensor’s stabilization time can be satisfied just by adjusting DAT0 and DAT1 properly.
  • Page 48 Low-power mode procedure in TRAVEO T2G family ™ 3 Power modes transition Table 13 (continued) List of smart I/O in cyclic wakeup configuration parameters Parameters Description Value lutCfgLut3.lutMap Configures LUT3[3] output 0x78ul pattern setting lutCfgLut3.tr0 Configures LUT3[3] tr0 input CY_SMARTIO_LUTTR_DU_OUT lutCfgLut3.tr1 Configures LUT3[3] tr1 input CY_SMARTIO_LUTTR_LUT0_OUT...
  • Page 49 Low-power mode procedure in TRAVEO T2G family ™ 3 Power modes transition Table 14 (continued) List of smart I/O in cyclic wakeup configuration functions Functions Description Remarks Init_SmartIO_Cfg() Configures smart I/O Code Listing 25 Cy_SmartIO_Deinit() Resets the smart I/O to default Code Listing 26 values Cy_GPIO_Inv()
  • Page 50 Low-power mode procedure in TRAVEO T2G family ™ 3 Power modes transition Code Listing 20 Event generator configuration * \var cy_stc_evtgen_config_t evtgenConfig * \brief Evtgen configuration /* Eventgenerator Configuration */ const cy_stc_evtgen_config_t evtgenConfig .frequencyRef 8000000ul, /**< clk_ref = clk_hf1 = CLK_PATH2 (IMO) -> 8,000,000 for silicon */ .frequencyLf 32000ul,...
  • Page 51 Low-power mode procedure in TRAVEO T2G family ™ 3 Power modes transition Code Listing 21 CyclicWakeUp_SystemUpdate() function /* SystemUpdate for Cyclic wakeup */ void CyclicWakeUp_SystemUpdate(void) SRSS->unPWR_CTL2.stcField.u1LINREG_DIS 0ul; SRSS->unPWR_CTL2.stcField.u1BGREF_LPMODE 1ul; /*********************/ Clock Setthings /*********************/ /*** disabling ***/ /* Disable Fll */ SRSS->unCLK_FLL_CONFIG.stcField.u1FLL_ENABLE 0ul;...
  • Page 52 Low-power mode procedure in TRAVEO T2G family ™ 3 Power modes transition Initialize comparator structure /*******************************************/ Cy_Evtgen_InitializeCompStruct(EVTGEN0, EVTGEN_COMP_STRUCT_NO, &evtgenStructureConfig, &evtgenStruct0Context); Application note 002-20222 Rev. *G 2024-12-17...
  • Page 53 Low-power mode procedure in TRAVEO T2G family ™ 3 Power modes transition Code Listing 22 CyclicWakeUp_Operation() function /* Cyclic WakeUp function */ void CyclicWakeUp_Operation(void) /* confirm that output of LUT1 has been cleared */ while((LUT1_OUT_LED_PORT->unIN.u32Register >> (LUT1_OUT_LED_PIN)) & CY_GPIO_IN_MASK){}; /* clear chip_data_out[1] before entering deepsleep*/ LUT1_OUT_LED_PORT->unOUT_CLR.u32Register CY_GPIO_OUT_MASK <<...
  • Page 54 Low-power mode procedure in TRAVEO T2G family ™ 3 Power modes transition if(CYCLIC_ADC_POT_MACRO->CH[ADC_GROUP_FIRST_LOGICAL_CHANNEL].unINTR.stcField.u1CH_RANGE 1ul) { g_flagContinueCWK false; (uint8_t ch ADC_GROUP_FIRST_LOGICAL_CHANNEL; < (ADC_GROUP_FIRST_LOGICAL_CHANNEL ADC_GROUP_NUMBER_OF_CHANNELS); ch++) /* Clear interrupt source */ CYCLIC_ADC_POT_MACRO->CH[ch].unINTR.u32Register 0xFFFFFFFFul; Code Listing 23 Init_SmartIO() function /* Smart IO module initialization */ void Init_SmartIO(void) Cy_SmartIO_Deinit(SMART_IO_PORT);...
  • Page 55 Low-power mode procedure in TRAVEO T2G family ™ 3 Power modes transition Code Listing 25 Init_SmartIO_Cfg() function cy_en_smartio_status_t Init_SmartIO_Cfg(void) /* Configures Smart I/O */ /* Configure smart io to output H in deepsleep * Using data unit and LUT0,1,2,3 to create a 11bit counter * Data uint acts as lower 8 bit, count up from 0 to value written in DATA, reset to 0 at overflow * LUT0 acts as 9th bit, LUT3 acts as 10th bit and LUT 1 act as 11th bit...
  • Page 56 Low-power mode procedure in TRAVEO T2G family ™ 3 Power modes transition lutCfgLut3.lutMap 0x78ul; lutCfgLut3.tr0 (cy_en_smartio_luttr_t)CY_SMARTIO_LUTTR_DU_OUT; lutCfgLut3.tr1 (cy_en_smartio_luttr_t)CY_SMARTIO_LUTTR_LUT0_OUT; lutCfgLut3.tr2 (cy_en_smartio_luttr_t)CY_SMARTIO_LUTTR_LUT3_OUT; smart_io_cfg.lutCfg[3] &lutCfgLut3; /*************************** Lut2 config ***************************/ /* Configure LUT3 [2] */ lutCfgLut2.opcode CY_SMARTIO_LUTOPC_COMB; lutCfgLut2.lutMap 0x80ul; lutCfgLut2.tr0 (cy_en_smartio_luttr_t)CY_SMARTIO_LUTTR_DU_OUT; lutCfgLut2.tr1 (cy_en_smartio_luttr_t)CY_SMARTIO_LUTTR_LUT0_OUT; lutCfgLut2.tr2 (cy_en_smartio_luttr_t)CY_SMARTIO_LUTTR_LUT3_OUT;...
  • Page 57 Low-power mode procedure in TRAVEO T2G family ™ 3 Power modes transition Code Listing 26 Cy_SmartIO_Deinit() function void Cy_SmartIO_Deinit(volatile stc_SMARTIO_PRT_t* base) un_SMARTIO_PRT_CTL_t workCTL= {.u32Register 0ul}; workCTL.stcField.u1ENABLED CY_SMARTIO_DISABLE; /* Resets the Smart I/O to default values */ workCTL.stcField.u1PIPELINE_EN CY_SMARTIO_ENABLE; workCTL.stcField.u5CLOCK_SRC CY_SMARTIO_CLK_GATED; workCTL.stcField.u8BYPASS CY_SMARTIO_CHANNEL_ALL;...
  • Page 58 Low-power mode procedure in TRAVEO T2G family ™ 3 Power modes transition CAN_RX Bus Idle MCU Power Active DeepSleep Active mode ・CAN not operational ・Wakeup by GPIO interrupt ・Software enables CAN RX functionality ・Setup GPIO (CAN RX to GPIO) (GPIO to CAN RX) ・Enter DeepSleep mode by software ・CAN communication start Figure 16...
  • Page 59 Low-power mode procedure in TRAVEO T2G family ™ 3 Power modes transition Code Listing 28 Example to CAN wakeup operation main(void) /* Wakeup by GPIO interrupt. See (d) of Figure Code Listing 29 Cy_SysInt_SetSystemIrqVector(gpio_irq_cfg.sysIntSrc, GpioIntHandler); for(;;) /* Stop CAN */ /* CAN Clock stop request */ /* Stop CANFD.
  • Page 60 Low-power mode procedure in TRAVEO T2G family ™ 3 Power modes transition Code Listing 29 GpioIntHandler() function /* Handler for GPIO interrupts */ void GpioIntHandler(void) uint32_t intStatus; /* If falling edge detected */ intStatus Cy_GPIO_GetInterruptStatusMasked(CY_CANFD0_RX_PORT, CY_CANFD0_RX_PIN); (intStatus 0ul) Cy_GPIO_ClearInterrupt(CY_CANFD0_RX_PORT, CY_CANFD0_RX_PIN); Code Listing 30 Cy_GPIO_Init() function cy_en_gpio_status_t Cy_GPIO_Pin_Init(volatile stc_GPIO_PRT_t *base,...
  • Page 61 Low-power mode procedure in TRAVEO T2G family ™ 3 Power modes transition Code Listing 31 Cy_SysPm_DeepSleep() function /* Sets a CPU core to the DeepSleep mode */ cy_en_syspm_status_t Cy_SysPm_DeepSleep(cy_en_syspm_waitfor_t waitFor) uint32_t interruptState; cy_en_syspm_status_t retVal CY_SYSPM_SUCCESS; /* Call the registered callback functions with * the CY_SYSPM_CHECK_READY parameter.
  • Page 62 Low-power mode procedure in TRAVEO T2G family ™ 3 Power modes transition if(waitFor CY_SYSPM_WAIT_FOR_EVENT) __WFI(); else __WFE(); while (0); //rmkn _FLD2VAL(CPUSS_CM4_PWR_CTL_PWR_MODE, CPUSS- >unCM4_PWR_CTL.u32Register) == CY_SYSPM_CM4_PWR_CTL_PWR_MODE_RETAINED); #endif /* (0u != CY_CPU_CORTEX_M0P) */ Cy_SysLib_ExitCriticalSection(interruptState); /* Call the registered callback functions with the CY_SYSPM_AFTER_TRANSITION parameter.
  • Page 63 Low-power mode procedure in TRAVEO T2G family ™ Glossary Glossary Table 16 Glossary Terms Description Analog-to-digital converter. See the “SAR ADC” chapter of the architecture reference manual for details. Basic WDT Basic watchdog timer. See the “Watchdog Timer” chapter of the architecture reference manual for details.
  • Page 64 Low-power mode procedure in TRAVEO T2G family ™ Glossary Table 16 (continued) Glossary Terms Description Real-time clock. See the “Real-time clock” chapter of the architecture reference manual for details. Serial communication block. See the “Serial communication block (SCB)” chapter of architecture reference manual for details.
  • Page 65 Low-power mode procedure in TRAVEO T2G family ™ References References The following are the TRAVEO T2G family series datasheets and technical reference manuals. Contact ™ Technical Support to obtain these documents. Device datasheets: ® ® • CYT2B6 datasheet 32-bit Arm Cortex -M4F microcontroller TRAVEO T2G family...
  • Page 66 Low-power mode procedure in TRAVEO T2G family ™ Other references Other references A sample driver library (SDL) including startup as sample software to access various peripherals is provided. SDL also serves as a reference to customers, for drivers that are not covered by the official AUTOSAR products. The SDL cannot be used for production purposes as it does not qualify to any automotive standards.
  • Page 67 2020-12-03 Updated power modes transition: Updated cyclic wakeup Operation: Added “Usage of smart I/O in cyclic wakeup”. 2021-04-19 Updated to Infineon template. 2021-10-21 Added example of SDL code and description in all instances. 2023-11-13 Template update; no content update. 2024-12-17...
  • Page 68 Infineon Technologies, All Rights Reserved. information given herein in the real application. Infineon Technologies’ products may not be used in Infineon Technologies hereby disclaims any and all   any applications where a failure of the product or...

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