HP Compaq d330 DT Technical Reference Manual page 65

AGP 2X Transfers
(NOT SUPPORTED IN THESE SYSTEMS)
During AGP 2X transfers, clocking is basically the same as in 1X transfers except that the 66-
MHz CLK signal is used to qualify only the control signals. The data bytes are latched by an
additional strobe (AD_STBx) signal so that an 8-byte transfer occurs in one CLK cycle (Figure 4-
6). The first four bytes (DnA) are latched by the receiving agent on the falling edge of AD_STBx
and the second four bytes (DnB) are latched
A A GP 2X transfers may be 3.3 or 1.5 VDC. GP 2X transfers may be 3.3 or 1.5 VDC.
T1
CLK
AD
AD_STBx
GNT-
TRDY-
ST0..2
00x
F F igure 4-6. AGP 2X Data Transfer (Peak Transfer Rate: 532 MB/s) igure 4-6. AGP 2X Data Transfer (Peak Transfer Rate: 532 MB/s)
AGP 4X Transfers AGP 4X Transfers
The AGP 4X transfer rate allows sixteen bytes of data to be transferred in one clock cycle. As The AGP 4X transfer rate allows sixteen bytes of data to be transferred in one clock cycle. As
2X transfers the 66-MHz CLK signal is used only for qualifying control signals while strobe 2X transfers the 66-MHz CLK signal is used only for qualifying control signals while strobe
signals are used to latch each 4-byte transfer on the AD lines. As signals are used to latch each 4-byte transfer on the AD lines. As
b b lock DnA is latched by the falling edge of AD_STBx while DnB is latched by the falling edge of lock DnA is latched by the falling edge of AD_STBx while DnB is latched by the falling edge of
A A D_STBx-. The signal l D_STBx-. The signal l eve eve
T1
CLK
AD
AD_STBx
AD _STBx-
ST0..2
xxx
Figure 4-7. AGP 4X Data Transfer (Peak Transfer Rate: 1064 MB/s) Figure 4-7. AGP 4X Data Transfer (Peak Transfer Rate: 1064 MB/s)
on the rising edge of AD_STBx. The signal level for he rising edge of AD_STBx. The signal level for
T2 T3 T4
D1A D1B D2A
xxx xxx
l for AGP 4X transfers is 1.5 VDC. l for AGP 4X transfers is 1.5 VDC.
T2
D1A D1B
00x
hp compaq d330 and d530 Series of Personal Computers
Featuring the Intel Pentium 4 Processor
First Edition - June 2003
Technical Reference Guide
T5 T6
D2B D3A D3B D4A D4B
xxx
xxx
shown in Figure 4-7, 4-byte shown in Figure 4-7, 4-byte
T3
D2A D2B D3A D3B D4A D4B
xxx
T7
xxx
in in
T4
xxx
4-11