NXP Semiconductors i.MX8 Manual

AN13215
Introduction to Boundary Scan of i.MX8/i.MX8X
Rev. 0 - 04/2021
by: NXP Semiconductors

1 Introduction

The i.MX 8/i.MX 8X families provide the boundary scan feature according to the
IEEE1149.1 specification via the JTAG controller.
The boundary scan is a method for checking the interconnections on PCBs and
internal IC sub-blocks. The mechanism is defined in the IEEE1149.1 standard.

2 Purpose

This application note shows how to use a Boundary Scan Description Language (BSDL) file associated with a Lauterbach
debugger to set all i.MX8 IOs into a known state through the boundary scan. When this is achieved, the proper IO state can be
checked using a multimeter to ensure there is no issue with the board.
This document focuses on entering the boundary scan mode for the board-level test. It provides the setup sequence and script
examples to ensure first-pass success.
The engineers should be familiar with the standard for the test access port and boundary scan architecture from the IEEE
1149.1 specification.

3 Overview

3.1 Boundary scan
The boundary scan technique allows the signals at component boundaries to be controlled and observed through the shift-register
stage associated with each pad. Each stage is a part of a larger boundary scan register cell, and cells for each pad are
interconnected serially to form a shift-register chain around the border of the design. This register can be used to read and write
port states.
In the normal mode, these cells are transparent and the core is connected to the ports. In the boundary scan mode, the core is
isolated from the ports and the port signals are controlled by the JTAG interface.
Figure 1 shows the JTAG controller block with the associated signals and exported registers. For more details, see the IEEE
1149.1 specification and the i.MX 8/i/MX 8X reference manuals.
Contents
1 Introduction......................................1
2 Purpose........................................... 1
3 Overview......................................... 1
4 Software setup................................ 2
5 Hardware setup............................... 3
6 Boundary scan using i.MX 8/i.MX 8
BSDL file and Lauterbach JTAG
debugger......................................... 6
7 Revision history............................. 10
Application Note