Grounding And Layout - Analog Devices AD9833 Manual

Sinusoidal Output
The SIN ROM is used to convert the phase information from
the frequency and phase registers into amplitude information
that results in a sinusoidal signal at the output. To have a
sinusoidal output from the VOUT pin, set the MODE (D1) bit to 0
and the OPBITEN (D5) bit to 0.
Triangle Output
The SIN ROM can be bypassed so that the truncated digital output The printed circuit board that houses the AD9833 should be
from the NCO is sent to the DAC. In this case, the output is no
longer sinusoidal. The DAC will produce a 10-bit linear trian-
gular function. To have a triangle output from the VOUT pin,
set the MODE (D1) bit = 1.
Note that the SLEEP12 bit must be 0 (i.e., the DAC is enabled)
when using this pin.
Table XI. Various Outputs from VOUT
OPBITEN Bit MODE Bit DIV2 Bit VOUT Pin
0 0
0 1
1 0
1 0
1 1
V
OUT MAX
V
OUT MIN
2
Figure 6. Triangle Output
APPLICATIONS
Because of the various output options available from the part, the
AD9833 can be configured to suit a wide variety of applications.
One of the areas where the AD9833 is suitable is in modulation
applications. The part can be used to perform simple modu-
lation, such as FSK. More complex modulation schemes, such as
GMSK and QPSK, can also be implemented using the AD9833.
In an FSK application, the two frequency registers of the AD9833
are loaded with different values. One frequency will represent
the space frequency, while the other will represent the mark
frequency. Using the FSELECT bit in the control register of the
AD9833, the user can modulate the carrier frequency between
the two values.
The AD9833 has two phase registers; this enables the part to
perform PSK. With phase shift keying, the carrier frequency
is phase shifted, the phase being altered by an amount that is
related to the bit stream being input to the modulator.
REV. A
X Sinusoid
X Triangle
0 DAC Data MSB/2
1 DAC Data MSB
X Reserved
4
The AD9833 is also suitable for signal generator applications.
Because the MSB of the DAC data is available at the VOUT
pin, the device can be used to generate a square wave.
With its low current consumption, the part is suitable for appli-
cations in which it can be used as a local oscillator.

GROUNDING AND LAYOUT

designed so that the analog and digital sections are separated
and confined to certain areas of the board. This facilitates the
use of ground planes that can be separated easily. A minimum
etch technique is generally best for ground planes since it gives
the best shielding. Digital and analog ground planes should be
joined in one place only. If the AD9833 is the only device requiring
an AGND to DGND connection, then the ground planes should
be connected at the AGND and DGND pins of the AD9833. If
the AD9833 is in a system where multiple devices require AGND
to DGND connections, the connection should be made at one
point only, a star ground point that should be established as
close as possible to the AD9833.
Avoid running digital lines under the device as these will couple
noise onto the die. The analog ground plane should be allowed to
run under the AD9833 to avoid noise coupling. The power supply
lines to the AD9833 should use as large a track as possible to
provide low impedance paths and reduce the effects of glitches
on the power supply line. Fast switching signals, such as clocks,
should be shielded with digital ground to avoid radiating noise
to other sections of the board. Avoid crossover of digital and
analog signals. Traces on opposite sides of the board should run
6
at right angles to each other. This will reduce the effects of
feedthrough through the board. A microstrip technique is by far
the best but is not always possible with a double-sided board. In
this technique, the component side of the board is dedicated to
ground planes, while signals are placed on the other side.
Good decoupling is important. The AD9833 should have supply
bypassing of 0.1 μF ceramic capacitors in parallel with 10 μF
tantalum capacitors. To achieve the best from the decoupling
capacitors, they should be placed as close as possible to the
device, ideally right up against the device.
Proper operation of the comparator requires good layout strategy.
The strategy must minimize through proper layout of the PCB
the parasitic capacitance between V
pin by adding isolation using a ground plane. For example, in a
4-layer board, the C
and the SIGN BIT OUT connected to the bottom layer, so that
isolation is provided by the power and ground planes between.
–13–
AD9833
and the SIGN BIT OUT
IN
signal could be connected to the top layer
IN