Cypress CY62128EV30 Specification Sheet
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Cypress CY62128EV30 Specification Sheet

Mobl 1 mbit (128k x 8) static ram
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Features
■
Very high speed: 45 ns
❐
Temperature ranges:
• Industrial: –40°C to +85°C
• Automotive-A: –40°C to +85°C
• Automotive-E: –40°C to +125°C
■
Wide voltage range: 2.20V – 3.60V
■
Pin compatible with CY62128DV30
■
Ultra low standby power
Typical standby current: 1 μA
❐
Maximum standby current: 4 μA
❐
■
Ultra low active power
❐
Typical active current: 1.3 mA @ f = 1 MHz
■
Easy memory expansion with CE
■
Automatic power down when deselected
■
CMOS for optimum speed and power
■
Offered in Pb-free 32-pin SOIC, 32-pin TSOP I, and 32-pin
STSOP packages
Logic Block Diagram
CE 1
CE 2
Note
1. For best practice recommendations, refer to the Cypress application note "System Design Guidelines" at
Cypress Semiconductor Corporation
Document #: 38-05579 Rev. *D
MoBL® 1 Mbit (128K x 8) Static RAM
, CE
and OE features
1
2
INPUT BUFFER
A 0
A 1
A 2
A 3
A 4
A 5
128K x 8
A 6
A 7
ARRAY
A 8
A 9
A 10
A 11
COLUMN DECODER
WE
OE
•
198 Champion Court

Functional Description

[1]
The CY62128EV30
is a high performance CMOS static RAM
module organized as 128K words by 8 bits. This device features
advanced circuit design to provide ultra low active current. This
is ideal for providing More Battery Life™ (MoBL
applications such as cellular telephones. The device also has an
automatic power down feature that significantly reduces power
consumption when addresses are not toggling. Placing the
device into standby mode reduces power consumption by more
than 99% when deselected (CE
input and output pins (IO
through IO
0
impedance state when the device is deselected (CE
CE
LOW), the outputs are disabled (OE HIGH), or a write
2
operation is in progress (CE
LOW).
To write to the device, take Chip Enable (CE
HIGH) and Write Enable (WE) inputs LOW. Data on the eight IO
pins is then written into the location specified on the Address pin
(A
through A
).
0
16
To read from the device, take Chip Enable (CE
HIGH) and Output Enable (OE) LOW while forcing Write Enable
(WE) HIGH. Under these conditions, the contents of the memory
location specified by the address pins appear on the IO pins.
POWER
DOWN
http://www.cypress.com.
,
•
San Jose
CA 95134-1709
CY62128EV30
®
) in portable
HIGH or CE
LOW). The eight
1
2
) are placed in a high
7
HIGH or
1
LOW and CE
HIGH and WE
1
2
LOW and CE
1
LOW and CE
1
IO 0
IO 1
IO 2
IO 3
IO 4
IO 5
IO 6
IO 7
•
408-943-2600
Revised March 28, 2008
2
2
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Summary of Contents for Cypress CY62128EV30

  • Page 1: Functional Description

    Document #: 38-05579 Rev. *D MoBL® 1 Mbit (128K x 8) Static RAM Functional Description The CY62128EV30 module organized as 128K words by 8 bits. This device features advanced circuit design to provide ultra low active current. This is ideal for providing More Battery Life™ (MoBL applications such as cellular telephones.

  • Page 2: Pin Configuration

    3. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at V Document #: 38-05579 Rev. *D Speed Range (V) (ns) f = 1 MHz CY62128EV30 TSOP I Top View (not to scale) Power Dissipation Operating I...

  • Page 3: Maximum Ratings

    < 0.2V > V – 0.2V or V < 0.2V, = 3.60V (min) and 200 μs wait time after V spec. Other inputs can be left floating. CCDR CY62128EV30 Ambient Range Temperature Ind’l/Auto-A –40°C to +85°C 2.2V to 3.6V Auto-E –40°C to +125°C...

  • Page 4: Thermal Resistance

    = 1.5V, − 0.2V or CE > V < 0.2V, − 0.2V or V > V < 0.2V > 100 μs or stable at V to V CC(min) CC(min) CY62128EV30 Unit SOIC STSOP 48.67 32.56 °C/W 3.42 25.86 3.59 °C/W Fall Time = 1 V/ns 3.0V...

  • Page 5: Switching Characteristics

    , and t HZCE LZCE HZOE LZOE . All signals must be ACTIVE to initiate a write and any of these signals can CY62128EV30 CC(min) 55 ns (Auto-E) Unit is HIGH or CE is LOW, CE is HIGH. /2, input CC(typ) on page 4.

  • Page 6: Switching Waveforms

    20. During this period, the IOs are in output state. Do not apply input signals. Document #: 38-05579 Rev. *D DATA VALID [10, 15, 18, 19] DATA VALID , CE transition HIGH. CY62128EV30 [15, 16] DATA VALID [10, 16, 17] HZOE HZCE HIGH...
  • Page 7 ADDRESS DATA IO Figure 6. Write Cycle No. 3 (WE controlled, OE LOW) ADDRESS NOTE 20 DATA IO HZWE Table 2. Truth Table for CY62128EV30 Inputs/Outputs High Z High Z Data Out High Z Data in Document #: 38-05579 Rev. *D...

  • Page 8: Ordering Information

    51-85056 32-pin TSOP Type I (Pb-free) 51-85056 32-pin TSOP Type I (Pb-free) 0.546[13.868] 0.566[14.376] 0.440[11.176] 0.450[11.430] 0.006[0.152] 0.012[0.304] 0.118[2.997] MAX. 0.004[0.102] 0.004[0.102] MIN. SEATING PLANE CY62128EV30 Operating Range Industrial Automotive-A Automotive-E 0.047[1.193] 0.063[1.600] 0.023[0.584] 0.039[0.990] 51-85081-*B Page 8 of 11 [+] Feedback...
  • Page 9 CY62128EV30 Package Diagrams (continued) Figure 8. 32-Pin Thin Small Outline Package Type I (8 x 20 mm), 51-85056 51-85056-*D Document #: 38-05579 Rev. *D Page 9 of 11 [+] Feedback...
  • Page 10 CY62128EV30 Package Diagrams (continued) Figure 9. 32-Pin Shrunk Thin Small Outline Package (8 x 13.4 mm), 51-85094 51-85094-*D Document #: 38-05579 Rev. *D Page 10 of 11 [+] Feedback...
  • Page 11 Document History Page Document Title: CY62128EV30 MoBL® 1 Mbit (128K x 8) Static RAM Document Number: 38-05579 REV. ECN NO. Issue Date Orig. of Change 285473 See ECN 461631 See ECN 464721 See ECN 1024520 See ECN 2257446 See ECN ©...

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