Cypress CY966B0 Series Manual

CY966B0 series is based on Cypress advanced F
The CPU uses the same instruction set as the established F
2
Software to the new F MC-16FX products.
2
F MC-16FX product improvements compared to the previous generation include significantly improved performance - even at the
same operation frequency, reduced power consumption and faster start-up time.
For high processing speed at optimized power consumption an internal PLL can be selected to supply the CPU with up to 32MHz
operation frequency from an external 4MHz to 8MHz resonator. The result is a minimum instruction cycle time of 31.2ns going
together with excellent EMI behavior. The emitted power is minimized by the on-chip voltage regulator that reduces the internal CPU
voltage. A flexible clock tree allows selecting suitable operation frequencies for peripheral resources independent of the CPU speed.
Features
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Technology
0.18m CMOS
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CPU
2
 F MC-16FX CPU
 Optimized instruction set for controller applications
(bit, byte, word and long-word data types, 23 different
addressing modes, barrel shift, variety of pointers)
 8-byte instruction queue
Signed multiply (16-bit  16-bit) and divide (32-bit/16-bit)

instructions available

System clock
On-chip PLL clock multiplier (1 to 8, 1 when PLL stop)

 4MHz to 8MHz crystal oscillator
(maximum frequency when using ceramic resonator
depends on Q-factor)
 Up to 8MHz external clock for devices with fast clock input
feature
 32.768kHz subsystem quartz clock
100kHz/2MHz internal RC clock for quick and safe startup,

clock stop detection function, watchdog
 Clock source selectable from mainclock oscillator, subclock
oscillator and on-chip RC oscillator, independently for CPU
and 2 clock domains of peripherals
 The subclock oscillator is enabled by the Boot ROM
program controlled by a configuration marker after a Power
or External reset
 Low Power Consumption - 13 operating modes (different
Run, Sleep, Timer, Stop modes)

On-chip voltage regulator
Internal voltage regulator supports a wide MCU supply
voltage range (Min=2.7V), offering low power consumption

Low voltage detection function
Reset is generated when supply voltage falls below
programmable reference voltage

Code Security
Protects Flash Memory content from unintended read-out

DMA
Automatic transfer function independent of CPU, can be
assigned freely to resources
Cypress Semiconductor Corporation
Document Number: 002-04721 Rev. *B
2
F
2
MC-16FX architecture (16-bit with instruction pipeline for RISC-like performance).
2
MC-16LX family thus allowing for easy migration of F

Interrupts
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CAN
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USART
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2
I
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A/D converter
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Source Clock Timers
• 198 Champion Court
MC-16FX 16-Bit Microcontroller
Fast Interrupt processing
8 programmable priority levels
Non-Maskable Interrupt (NMI)
Supports CAN protocol version 2.0 part A and B
ISO16845 certified
Bit rates up to 1Mbps
32 message objects
Each message object has its own identifier mask
Programmable FIFO mode (concatenation of message
objects)
Maskable interrupt
Disabled Automatic Retransmission mode for Time
Triggered CAN applications
Programmable loop-back mode for self-test operation
Full duplex USARTs (SCI/LIN)
Wide range of baud rate settings using a dedicated reload
timer
Special synchronous options for adapting to different
synchronous serial protocols
LIN functionality working either as master or slave LIN
device
Extended support for LIN-Protocol with 16-byte FIFO for
selected channels to reduce interrupt load
C
Up to 400kbps
Master and Slave functionality, 7-bit and 10-bit addressing
SAR-type
8/10-bit resolution
Signals interrupt on conversion end, single conversion
mode, continuous conversion mode,
stop conversion mode, activation by software, external
trigger, reload timers and PPGs
Range Comparator Function
Scan Disable Function
ADC Pulse Detection Function
Three independent clock timers (23-bit RC clock timer,
23-bit Main clock timer, 17-bit Sub clock timer)
,
• San Jose
CA 95134-1709
CY966B0 Series
2
MC-16LX
• 408-943-2600
Revised December 25, 2017