Quectel AF51Y Hardware Design page 18

BT_RXD
BT_DBG_TXD
BT_DBG_RXD
Control Signal Pins*
Pin Name
HOST_WAKEUP_BT
BT_WAKEUP_HOST
Coexistence Interface
Pin Name
COEX_TXD
COEX_RXD
RF Antenna Interfaces
Pin Name
ANT_WIFI1
ANT_WIFI0
ANT_BT
WLAN_SLP_CLK Interface*
Pin Name
WLAN_SLP_CLK
RESERVED Interfaces
Pin Name
AF51Y_Hardware_Design
Bluetooth UART
78 DI
receive
Bluetooth debug UART
23 DO
transmit
Bluetooth debug UART
22 DI
receive
Pin No. I/O Description
Host wakes up
61 DI
Bluetooth
Bluetooth wakes up the
60 DO
host
Pin No. I/O Description
LTE & WLAN &
59 DO Bluetooth coexistence
transmit
LTE & WLAN &
16 DI Bluetooth
coexistence receive
Pin No. I/O Description
Bluetooth and 2.4G &
28 AIO 5G WLAN antenna
interface 0
2.4G & 5G WLAN
33 AIO
antenna interface 1
Reserved dedicated
25 AIO Bluetooth antenna
interface
Pin No. I/O Description
External 32.768 kHz
15 DI
sleep clock input
Pin No. I/O Description
Wi-Fi&Bluetooth Module Series
1.8 V power domain
1.8 V power domain.
If unused, keep this pin open.
1.8 V power domain.
If unused, keep this pin open.
Comment
1.8 V power domain.
If unused, keep this pin open.
1.8 V power domain.
If unused, keep this pin open.
Comment
1.8 V power domain.
If unused, keep this pin open.
1.8 V power domain.
If unused, keep this pin open.
Comment
50 Ω impedance
50 Ω impedance
50 Ω impedance
Comment
1.8 V power domain
Comment
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