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APPENDICES
MELSEC-A
(1) When the power supply is turned ON or the PC CPU is reset, DC1 is
not transmitted to the external device.
The state is the same as when DC1 was transmitted.
(2) If transmitted, DCllDC3 can be switched.
Section
*.*
gives switching method details.
4.2
DC21DC4 Send Control
(1)
DC2lDC4 send control is discussed below.
The AlSJ71C24 adds DC2 to the head of the transmitted data and DC4
to the end of the transmitted data under the following two conditions:
(a) When data is transmitted from the A1 SJ71 C24 t o an external device.
(b) When response data (ACWNAK) is transmitted for data receive in a
bidirectional mode
0
(2)
DC2 and DC4 are not included in the data the user transmits from an
external device to the AlSJ71C24.
If it is necessary t o include DC2 and DC4
in
data, do not do receive
control of DC2lDC4.
External device
Send order
4.3
DCllDC3 Receive Control
A1 5171 C24
(1)
DCllDC3 receive control is send control under the following circumstan-
ces:
When data is transmitted from the AlSJ71C24 to an external device and
when response data (ACWNAK) is transmitted for data receive in the
bidirectional mode
(a) When DC3 is received from the external device, the AlSJ71C24
interrupts the data send.
D
C
2
The user cannot access the received DC3.
(b)
When D C l is received from the external device, the AlSJ71C24
restarts the data send.
Data
Transmitted data that was interrupted by receiving DC3 is trans-
mitted.
The user cannot access the received DC1.
D
C
4
APP
-
5
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