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Theory of Operat i on - PG 508
variat ions and dc offset current s are sum m ed at t he
collect ors of Q945 and Q954 , t he out put pulse high level
changes t o m axim um volt age and t he low level rem ains at
OV .
volt age requirem ent s for t he am plifier t ransist ors . The
range of t he posit ive t racking supply is +6 t o +26 V , wit h a
-6 t o -26 V range for t he negat ive supply .
It follows t hat any posit ive increase in eit her t he hi ghor
low level cont rol volt ages causes an increase in t he dc
offset current . A decrease in eit her cont rol volt age causes
a decrease in offset current . However , signal current
variat ions respond only t o differences bet ween t hese
cont rol volt ages . The larger t he volt age difference , t he
larger
t he signal
current
am plit ude int o t he out put
am plifier .
The out put circuit funct ions as a linear current driven
operat ional am plifier wit h a closed loop t ransresist ance
gain of 2 V/ m A . Negat ive feedback t hrough R1 042 t o t he
input node ( collect ors of Q945 and Q954 ) causes a virt ural
ground at t he input . A 1 0 m A peak t o peak input signal
creat es a 20 V peak t o peak out put pulse ( open circuit ) .
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Si nce t he out put am plifier is a com plem ent ary circuit ,
only t he operat ion of one side will be explained .
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Since t he dynam ic range of t he pulse generat or out put
is + or
20 V , and t he m axim um am plit ude is only 20 V
peak t o peak , clam ping circuit s are provided t o prevent t he
difference bet ween t he high and low level cont rol volt ages
from exceedi ng +2.6 V , which corresponds t o m axim um
out put . A clam ping circuit also prevent s t he high level
from becom ing less t han t he low level cont rol volt age .
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The level cont rol unit y gain am plifiers U780A and
U780B cont ain a precision diode clam p com posed of
CR782 , CR790 , R780 , and R782 . Since t he feedback for
U780A is t aken from t he cat hode of CR790 , t he volt age at
t he j unct ion of CR782 and CR790 is equal t o t he low level
cont rol volt age plus one diode drop ( CR790 ) . If t he high
level at t em pt s t o decrease below t he low level or at t em pt s
t o increase above t he high level cont rol volt age , CR782
conduct s clam ping t he high level at t he low level volt age .
Current lim it ing for U780B , during clam ping , is provided
by R780 .
For a posit ive - going out put pulse , current is driven int o
t he input node . Thi s act ion causes an increase in base
current t o Q975 which decreases t he base drive t o Q980 . A
cascode circuit is form ed by Q980 and Q990 , wit h R985
and L980 serving as a const ant current source t o t he
com m on collect or - em it t er connect i on . Therefore , when
t he base drive t o Q980 is decreased , t he current in Q990
increases . ( The const ant current source supplies ap
proxim at ely 60 m A which , wit h no signal , is equally
divided
bet ween
Q980 and
Q990 .) Anot her const ant
current source , Q1 000 , causes a 2.0 V drop across R1 002 .
The em it t er follower , Q995 , buffers t his pot ent ial and
provides a volt age source for t he base of t he cascode
t ransist or , Q990 . An increasing current t hrough Q990
increases t he base current from t he out put parallel em it t er
followers , Q1 01 0 and
Q1 01 5 . The em it t ers of t hese
t ransist ors drive t he out put posit ive t hrough a net work of
resist ors and capacit ors . Com ponent s R1 020 , R1 024 , and
C1 024 , in t his net work , are adj ust able t o provide an
int ernal resist ive 50 2 t erm inat ion for t he out put . Net work
C1 048 and R1 048 , wit h pot ent iom et er R1 050 , provides
t ransient response peaking for t he am plifier .
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U800A is also configured as a precision clam ping
circuit . The out put at pin 1 is equal t o t he low level cont rol
volt age plus 2.6 V plus one diode drop . Therefore , if t he
high level volt age at t em pt s t o exceed t he low level plus 2.6
volt s , or t he low level is decreased m ore t han 2.6 V below
t he high level , CR805 conduct s and t he high level is
clam ped at t he low level cont rol volt age plus 2.6 volt s . The
low level cont rol always overrides t he high level cont rol .
Current lim it ing for U780B , during clam ping , is provided
by R780 .
Equivalent
biasing
for
t he com plem ent ary out put
em it t er followers is provided by CR990 , R990 , and CR992 .
Wit h zero out put , t he quiescent current in each out put
follower is approxim at ely 20 m A . The out put pot ent ial is
available at t he rear int erface connect or , pin 25A , for
m onit oring t he out put am plit ude .
C
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Out put Am pli fi er
The posit ive and negat ive de volt ages for t his am plifier
are provided by dual power supplies which t rack t he high
and low level cont rol volt ages . These t racking supplies
ensure t hat t he posit ive pot ent ial is at least 6 V above t he
out put pulse high level and t he negat ive pot ent ial is at
least 6 volt s below t he out put pulse low level . This
arrangem ent enables t he pulse generat or t o provide a 40 V
dynam ic range , wit h a 20 V peak t o peak m axim um out put
pulse , while m aint aining m inim um power dissipat ion and
Power Supply
The +1 1 .5 Vdc from t he m ainfram e provides t he raw
supply volt age for t he series regulat ed +5.2 Vdc supply .
The
precision
volt age
regulat or ,
U1 21 0 ,
includes
a
t em perat ure com pensat ed volt age reference supply at pin
6. The
+5.2 V pot ent iom et er , R1 21 0 , wit h t he volt age
divider R1 209 and R1 21 1 provides t he reference input t o
t he non - invert ing input , pin 5. The out put volt age is
applied
t o t he invert ing input , pin 4 , t hrough R1 21 7 .
Sensing
differences in t he t wo input
pot ent ials , t he
regulat or am plifier provides base current drive from pin 1 0
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2-6
a
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