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Theory of Operat i on - PG 508
C
pulse is slow enough so t hat t he D input of flip flop U720A
has not reached t he high level when t he pulse at t he clock
t erm inal ( pin 6 ) of flip flop U720A goes high ( leading
port ion of t he next pulse driving t he t ransit ion circuit ry )
t he O t erm inal , pin 3 , of flip flop U720A goes high . Thi s
high is connect ed t o t he set t erm inal , pin 1 2 , of U720B
causing t he 1 t erm inal of U720B t o go high illum inat ing
t he CONTROL ERROR light . The on t im e and reset for t his
error
indicat ing
m ode
now
proceeds
as
previously
described .
cont rol volt ages . These volt ages are buffered by unit y gain
am plifiers U780A and U780B . Bot h cont rol volt ages range
bet ween
and +5.2 V. When t he cont rol volt ages are
equal , t he Y input is zero and t he m ult iplier signal out put
( X.Y) equals zero . A difference of +2.6 V bet ween t he high
and low level cont rol volt ages corresponds t o m axim um
out put am plit ude from t he pulse generat or .
n
n
n
n
Level Cont rol Mult i pli er
Thi s circuit ry provides independent t op and bot t om
level
cont rol of t he out put
pulse by cont rolling t he
am plit ude and offset of t he drive signal t o t he linear out put
am plifier . Also included is circuit ry t o accom plish t he
norm al com plem ent funct ion and t he preset funct ion .
Cont rol volt age clam ps t o ensure t he out put am plifier is
not over driven are also provided .
The norm al com plem ent swit ch invert s t he level cont rol
volt age input s t o different ial am plifier U895B . However ,
since t he difference bet ween t he volt ages is unchanged ,
t he cont rol volt age input signal has const ant am plit ude ,
but
reverses
polarit y .
This
com plem ent s
t he
pulse
generat or out put . The norm al com plem ent balance ad
j ust m ent ,
R91 0 ,
ensures t hat t he Y m ult iplier
input
responds equally t o changes in eit her t he high or low level
cont rol volt ages .
Am plit ude cont r
of t he signal occurs in t he analog
m ult iplier , U850 . The pulse signal provides t he X input ,
and t he level cont rol volt ages provide t he Y input . The X.Y
product of t hese input s is convert ed t o a drive current for
t he out put am plifier .
The signal current at pins 5 and 6 of U850 is t he pulse
signal . Since Q845 , in conj unct ion wit h U800B , provides a
const ant current sink , t he current t hrough R954 , from t he
em it t er of com m on base st age Q954 , also cont ains signal
current variat ions . The current driver for t he out put
am plifier is Q954 . The signal current s int o pins 8 and 9 of
U850 also cont ain t he pulse signal . However const ant
current sink R847 , and com m on base st age Q950 are
included only as a balancing t herm al load for t he m ul
t iplier .
n
n
Input and com plem ent puises from t he variable t ransi
t ion t im e generat or are applied t o t he bases of Q825 and
Q840 . These t ransist ors form
different ial am plifier ,
supplied by const ant current source U800B and Q820 . A
posit ive - going
signal
at t he base of Q825 , wit h
t he
com plem ent ary ( negat ive - goi ng ) signal at t he base of
Q840 causes t he signal current at pin 1 1 of t he m ult iplier t o
go negat ive and t he signal current at pin 1 2 t o go posi t i ve.
When t he pulse polarit y reverses , at t he bases of Q825 and
Q840 , t he signal current also reverses polarit y at pins 1 1
and 1 2. The di fference bet ween t he current s at pins 1 1 and
1 2 corresponds t o t he X signal input for t he m ult iplier .
To obt ain independent cont rol of t he out put pulse high
and
low levels , t he cont rol volt ages are averaged by
resist or net work R91 4 , R91 5 , R91 8 and R920 . High and
Low t racking pot ent im et ers , R91 5 and R920 , are ad
j ust able t o provide m inim um int eract ion bet ween pulse
levels . The de volt age from t his net work , along wit h t he
volt age from t he offset adj ust m ent R925 , is sum m ed and
invert ed by U930A . U930B proves furt her gain and level
shift ing and , in conj unct ion wit h Q945 , serves as a level
cont rolled offset generat or . A dc current source t o t he
collect or of Q954 is provided by Q945 . The collect or of
Q954 is t he virt ual ground input t o t he out put am plifier .
C
The t ot al current flowing from pins 2 and 3 of U850 is
essent ially equal t o t he current required by t he const ant
current source , U895A and Q900 . However , t he difference
in current s bet ween t hese pins corresponds t o t he Y input
signal for t he m ult iplier .
The am plit ude difference of t hese current s is cont rolled
by U895B . Thi s
is a dc different ial am plifier which
am plifies t he difference bet ween t he high & low level
cont rol volt ages t o produce t he Y input signal . Gain
adj ust m ent for t he Y input signal is provided by R885 .
When t he high and low level cont rol pot ent iom et ers are
bot h at m idrange ( +2.6 V zero out put ) Q945 sources all
t he quiescent bias current required by Q954 , which is
approxim at ely 1 5 m A . Therefore , t here is no current drive
t o t he out put am plifier t hrough R975 or R1 055 . If t he high
level cont rol is t urned fully cw ( m axim um out put ) , t he low
level cont rol volt age rem ains at +2.6 V. The high level
cont rol volt age increases t o +5.2 V. Thi s causes t he
volt age out put of U930A t o decrease , causing t he offset
generat or U930B and Q945 t o source approxim at ely 20
MA . This is an increase of 5 m A . Thi s di fference in cont rol
volt age set t ings also causes m axim um difference in t he
cont rol volt age input signal t o t he m ult iplier . This act ion
also causes 1 0 m A peak t o peak signal current variat ions in
t he collect or current of Q954 . Si nce t he signal current
The high and low level cont rol volt ages are det erm ined
by t heir respect ive front panel cont rols , R770B and R770A .
If t he preset funct i on is select ed , t he preset high and
preset low pot ent iom et ers , R775 and R785 , provide t he
@
2-5
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