Intel SYSTEM 310 Configuration Manual page 25

012B Board Jumpers
System 310
The four pairs of jumpers labeled 42 through 49 and one of the two
pairs of jumpers labeled 74 through 76 (five jumpers in all) affect the
first 8 bits of address — the low byte of a 16-bit address. For the set
labeled 42 through 49, each installed jumper connects its address line
to ground. When all five jumpers are connected, as they are in
preconfigured boards, they select all zeros (00000H) for the address
of the register. Therefore, to relocate the status/error register,
simply remove one of the jumpers. For example, removing 42-43
means that line D00 must now be high, so the new address of the
register is 0000 1H.
The jumpers labeled 50 through 73 affect the upper byte of a 16-bit
I/O address. Figure 3-1 shows these jumpers divided into two
columns, and B. Connecting all the pairs in column , as they are
in preconfigured systems, means that all 16 bits are significant in
selecting the address of the status/error register. In fact, the high
byte must be all zeros. Connecting the pairs in column B means the
upper 8 bits are irrelevant. The bottom half of Table 3-6 lists the
jumper connections for column .
BA ERY BACKUP JUMPERS
Since the System 310 does not back up data with batteries, the
jumpers that would connect a battery to the back-up circuit on the
012B memory board are not connected. Instead, preconfigured
systems connect 124 to 125 and 121 to 122 for power.
PARI Y ERROR IN ERRUP JUMPERS
The System 310 does not provide the software needed to permit
parity errors to interrupt the processor. Therefore, the parity error
interrupt jumpers, shown in Figure 3-1, are not connected. Refer to
the System 310 Processor Configuration Guide: 86/30 Single Board
Computer and the iSBC 012B Technical Manual for more information
about jumpers and available interrupts.
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