IMB-1235
The terms HDMI
®
and HDMI High-Definition
Multimedia Interface, and the HDMI logo are
trademarks or registered trademarks of HDMI
Licensing LLC in the United States and other
countries.
Revision History
Date
Description
April 12, 2023
First Release
November 28, 2023
Second Release
January 29, 2024
Third Release
1 : M.2 Key-E
2 : M.2 Key-M
Socket (M2_E1)
Socket (M2_M1)
PIN
SIGNAL
SIGNAL
PIN
PIN
SIGNAL
1
GND
+3.3V
2
1
GND
3
USB_D+
+3.3V
4
3
GND
5
USB_D-
NA
6
5
PERn3
7
GND
NA
8
7
PERp3
9
CNV_WGR_D1-
CNV_RF_RESET
10
9
GND
11
CNV_WGR_D1+
NA
12
11
PETn3
13
GND
MODEM_CLKREQ
14
13
PETp3
15
CNV_WGR_D0-
NA
16
15
GND
17
CNV_WGR_D0+
GND
18
17
PERn2
19
GND
NA
20
19
PERp2
21
CNV_WGR_CLK-
CNV_BRI_RSP
22
21
GND
23
CNV_WGR_CLK+
23
PETn2
25
PETp2
33
GND
CNV_BGI_DT
32
27
GND
35
PETp
CNV_RGI_RSP
34
29
PERn1
37
PETn
CNV_BRI_DT
31
PERp1
36
39
GND
NA
38
33
GND
41
PERp
NA
40
35
PETn1
43
PERn
NA
42
37
PETp1
45
GND
NA
44
39
GND
47
PEFCLKp
NA
46
41
PERn0
49
PEFCLKn
NA
48
43
PERp0
51
GND
SUSCLK
50
45
GND
53
CLKREQ#
PERST0#
52
47
PETn0
55
WAKE#
W_DISABLE1#
54
49
PETp0
57
GND
W_DISABLE2#
56
51
GND
59
CNV_WT_D1-
NA
58
53
PEFCLKn
61
CNV_WT_D1+
NA
60
55
PEFCLKp
63
GND
NA
62
57
GND
65
CNV_WT_D0-
CLKIN_XTAL_LCP
64
67
CNV_WT_D0+
NA
66
67
NA
69
GND
NA
68
69
PEDET
71
CNV_WT_CLK-
NA
70
71
GND
73
CNV_WT_CLK+
+3.3V
72
73
GND
75
GND
+3.3V
74
75
GND
3 : 4-pin ATX PWR Connector (4P_ATX1)
Pin Signal Name
Signal Name Pin
1
GND
GND
2
3
DC Input
DC Input
4
4 : M.2 Key-B Socket (M2_B1)
PIN
SIGNAL
SIGNAL
PIN
1
NA
+3.3V
2
3
GND
+3.3V
4
5
GND
FuLL_Card_Power_off
6
7
USB_D+
W_DISABLE1#
8
9
USB_D-
WWAN_LED#
10
11
GND
21
GND
NA
20
23
NA
NA
22
25
NA
NA
24
27
GND
W_DISABLE2#
26
29
USB3_RX-
NA
28
31
USB3_RX+
UIM_RESET
30
33
GND
UIM_CLK
32
35
USB3_TX-
UIM_DATA
34
37
USB3_TX+
UIM_PWR
36
39
GND
NA
38
41
PERn0
NA
40
43
PERP0
NA
42
45
GND
NA
44
47
PETn0
NA
46
49
PETP0
NA
48
51
GND
PERST#
50
53
PEFCLKn
CLKREQ#
52
55
PEFCLKp
WAKE#
54
57
GND
NA
56
59
NA
NA
58
61
NA
NA
60
63
NA
NA
62
65
NA
NA
64
67
NA
NA
66
69
PEDET
NA
68
71
GND
+3.3V
70
73
GND
+3.3V
72
75
NA
+3.3V
74
Jumpers and Headers Setting Guide
1
2
46
DC_JACK1
45
Thunderbolt
Type-C
(TC_T1)
44
Thunderbolt
Type-C
(TC_T0)
43
USB 3.2 Gen2
42
M2_M1
T: USB3_1
B: USB3_2
M2_E1
41
LAN1
40
LAN2
39
USB 2.0
T: USB2_3
B: USB2_4
1
BAT1
1
IMB-1235
38
Line Out
37
Mic In
1
36
SPDIF1
1
35
34 33
5 : USB 3.2 Gen1 Header (USB3_3)
Pin Signal Name
1
ID
3
IntA_P_D+
SIGNAL
PIN
5
IntA_P_D-
+3.3V
2
7
GND
+3.3V
4
9
IntA_P_SSTX+
NA
6
11
IntA_P_SSTX-
NA
8
13
SATA_LED
10
GND
+3.3V
12
15
IntA_P_SSRX+
+3.3V
14
17
IntA_P_SSRX-
+3.3V
16
19
Vbus
+3.3V
18
NA
20
NA
22
NA
24
6 : CPU FAN Connector (+12V) (CPU_FAN1)
NA
26
NA
28
NA
30
Pin
Signal Name
NA
32
NA
34
1
GND
NA
36
2
+12V
NA
38
3
CPU_FAN_SPEED
NA
40
NA
42
4
FAN_SPEED_CONTROL
NA
44
NA
46
NA
48
7 : SATA3 Connectors (SATA3_0, SATA3_1)
PERST#
50
CLKREQ#
52
WAKE#
54
Pin
Signal Name
NA
56
NA
58
1
GND
2
SATA-A+
NA
68
3
SATA-A-
+3.3V
70
+3.3V
72
4
GND
+3.3V
74
5
SATA-B-
6
SATA-B+
7
GND
3
8 : SATA Power Output Connector
1
Pin
Signal Name
1
+5V
2
GND
3
GND
4
2
4
+12V
9 : Brightness Control Mode (BLT_PWM2)
1-2: 3V Level (Default)
2-3: 5V Level
10 : Brightness Control Mode (BLT_PWM1)
1-2: From eDP PWM to CON_LBKLT_CTL
2-3: From LVDS PWM to CON_LBKLT_CTL
(Default)
* Please set to 1-2 when adjusting brightness by Brightness
Control bar under OS.
* Please set to 2-3 when adjusting brightness by
BLT_VOL1.
5
3
4
6
1
1
1
CPU_FAN1
USB3_3
1
4P_ATX1
1
BIOS
ROM
M2_B1
SIM1
BUZZ1
Industrial
1
1
RoHS
1
1
ESPI1
1
CI2
32
31
30
29
Signal Name Pin
2
2
IntA_P_D+
4
IntA_P_D-
GND
6
8
IntA_P_SSTX+
1
IntA_P_SSTX-
10
12
GND
14
IntA_P_SSRX+
IntA_P_SSRX-
16
18
Vbus
4
1
1
7
4
1
1
3
3
1
7
9
8
1
SATA_PWR1
BLT_PWM2
SATA3_1
1
SATA3_0
1
10
1
1
11 (*Backside: EDP1)
12
13
1
1
14
1
DDR4_A1
15
1
DDR4_B1
16
1
17
1
CLRMOS1
18
1
COM4
COM5
COM6
1
1
19
PWR_COM4
1
PWR_COM5
1
PWR_COM6
20
1
1
1
PANEL1
21
COM1
COM2
COM3
JGPIO_SET1
22
1
1
PWR_COM1
PWR_COM2
PWR_COM3
1
BUZZ2
1
1
SIO_AT1
PSON#_1
1
1
1
1
1
1
CI1
DACC1
JGPIO_PWR1
JGPIO1
28
27
26 25
24
23
11* : LVDS Panel Connector
Pin
Signal Name
Signal Name
20
1
LCD_VCC
LCD_VCC
3
+3.3V
N/A
5
N/A
LVDS_A_DATA0#
7
LVDS_A_DATA0
GND
19
9
LVDS_A_DATA1#
LVDS_A_DATA1
11
GND
LVDS_A_DATA2#
13
LVDS_A_DATA2
GND
15
LVDS_A_DATA3#
LVDS_A_DATA3
17
GND
LVDS_A_CLK#
19
LVDS_A_CLK
GND
21
LVDS_B_DATA0#
LVDS_B_DATA0
23
GND
LVDS_B_DATA1#
25
LVDS_B_DATA1
GND
27
LVDS_B_DATA2#
LVDS_B_DATA2
29
DPLVDD_EN
LVDS_B_DATA3#
31
LVDS_B_DATA3
GND
33
LVDS_B_CLK#
LVDS_B_CLK
35
GND
CON_LBKLT_EN
37
CON_LBKLT_CTL
LCD_BLT_VCC
39
LCD_BLT_VCC
LCD_BLT_VCC
* eDP Connector (EDP1)
(on the Backside of PCB)
12 : Backlight Volume Control
(BLT_VOL1)
Pin
Signal Name
1
GPIO_VOL_UP
2
GPIO_VOL_DW
3
PWRDN
4
BLT_UP
5
BLT_DW
6
GND
7
GND
13 : Inverter Power Control Wafer
(BLT_PWR1)
Pin
Signal Name
1
GND
2
GND
3
CON_LBKLT_CTL
4
CON_LBKLT_EN
5
LCD_BLT_VCC
6
LCD_BLT_VCC
14 : eDP Inverter Power Control Wafer
(EDP_BLT_PWR1)
Pin
Signal Name
1
GND
2
GND
3
CON_LBKLT_CTL
4
CON_LBKLT_EN
5
LCD_BLT_VCC
6
LCD_BLT_VCC
15 : Backlight Power Select
(LCD_BLT_VCC) (BKT_PWR1)
1-2: LCD_BLT_VCC: +5V (Default)
2-3: LCD_BLT_VCC: +12V
4-5: LCD_BLT_VCC: DC_IN
Pin
* PD (Panel Detection):
2
Connect this pin to LVDS
4
Panel's Ground pin to
6
8
detect Panel detection.
10
12
14
1 40
16
2
1
18
20
22
24
26
28
40
39
30
4 0
1
32
34
36
PIN
Signal Name
38
40
NA
40
39
LCD_BLT_VCC
38
LCD_BLT_VCC
37
LCD_BLT_VCC
36
LCD_BLT_VCC
→
35
SMB_CLK_MAIN
34
SMB_DATA_MAIN
33
eDP_BKLTCTL_R
32
eDP_BKLTEN
31
GND
30
GND
29
GND
28
GND
27
eDP_HPD_CON
26
GND
25
GND
24
GND
7
23
GND
22
NA
21
LCD_VCC
20
LCD_VCC
19
LCD_VCC
18
LCD_VCC
17
GND
1
16
eDP_AUX#_CON
15
eDP_AUX_CON
14
GND
13
eDP_TX0_CON
12
eDP_TX#0_CON
11
GND
10
eDP_TX1_CON
9
eDP_TX#1_CON
8
GND
7
eDP_TX2_CON
6
6
eDP_TX#2_CON
5
GND
4
eDP_TX3_CON
3
eDP_TX#3_CON
2
GND
1
NA
1
6
1
5
1
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