Onkyo TX-NR906 Service Manual page 130

IC BLOCK DIAGRAMS AND TERMINAL DESCRIPTIONS-63
Q8501 : SII9135ACTU ( HDMI Receiver)
TERMINAL DESCRIPTION(1/3)
Digital Video Output Pins
Pin # Dir
Pin Name
Output
Q0 16
Q1 15 Output
Q2 14 Output
Q3 13 Output
10 Output
Q4
9 Output
Q5
Output
Q6 8
Output
Q7 7
Q8 3 Output
Q9 2 Output
Q10 1 Output
144 Output
Q11
141 Output
Q12
Output
Q13 140
Output
Q14 139
Q15 138 Output
Q16 135 Output
Q17 134 Output
133 Output
Q18
132 Output
Q19
Output
Q20 129
Output
Q21 128
Q22 127 Output
Q23 126 Output
Q24 123 Output
122 Output
Q25
121 Output
Q26
Output
Q27 120
Output
Q28 117
Q29 116 Output
Q30 115 Output
Q31 114 Output
111 Output
Q32
110 Output
Q33
Output
Q34 109
Output
Q35 108
DE 19 Output
HSYNC 20 Output
VSYNC 21 Output
EVNODD 22 Output
5 Output
ODCK
Description
36-Bit Output Pixel Data Bus. Q35:0 is highly configurable using the
VDD_CONFIG register. It supports a wide array of output formats, including
multiple RBG and YCbCr bus formats. Using the appropriate bits in the PD
register, the output drivers can be put into a high impedance (tri-state) mode.
A weak, internal pull-down device brings each output to ground.
Data Enable.
Horizontal Sync Output.
Vertical Sync Output.
Indicates Even or Odd Field for Interlaced Formats.
Output Data Clock.
www.audiodna.sk
TX-NR906/NA906