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PRINCIPLES OF OPERATION
The PRO-2035 is a PLL (Phase-Locked Loop) synthesized VHF/UHF, FM/AM receiver, controlled by a CPU (Central
Processing Unit) via a keyboard.
The receiving mode and search step are initially set to correspond with the frequencies entered. Wh en a frequency
within the FM broadcast band is keyed in, the receiving mode is set to wideband FM (WFM). When a frequency in
the active radio band, such as police, fire, and ham radio, is keyed in, the mode is set to narrowband FM (NFM), and
when a frequency in the aircraft and CB band is keyed in, it sets to AM mode. Also, the receiving mode and fre-
quency step can be changed by the MODE and STEP keys.
All functions, such as the receiving frequency range, frequency determination, scanning, and deiay time, are con-
trolled by the CPU. The CPU is abIe to do oniy the assigned functions and no modification of the CPU is feasibie.
The following paragraphs explain the operation of the circuit in terms of the functional blocks:
The RF input circuit consists of bandpass filters (BPF). A signal generated by VC01, VC02, or VC03 is applied to
the double balanced mixer (OBM) and mixed with the RF signa!. The OBM is employed to facilitate 25 MHz to 1300
MHz mixing.
The 1st IF (07 and 08) is 609.005-613.5 MHz, and the signal is mixed with the VC04 frequency at the 2nd mixer
(09) to produce a 48.5 MHz signal, which is applied to the 2nd WFM IF (011) or 2nd NFM/AM IF (015, 016). Corre-
sponding with input from the keyboard, the CPU selects VC01, VC02, or VC03 and determines the WFM/NFM/AM
data of the PLL circuit that will function; then it outputs the necessary data.
A signal entered to NFM/AM IF is mixed with crystal oscillation frequency 48.045 MHz at the 3rd mixer (IC2) and
converted to a 455 kHz signa!. A signal entered to WFM IF is mixed with crystal oscillation frequency 37.8 MHz at
the 3rd mixer (013) and converted to a 10.7 MHz signa!. The signal is further amplified to be detecled as an AF sig-
na!.
The AF signals of WFM, NFM, and AM are controlled by the CPU and applied to the AF power amplifier (IC7) via the
switching circuit. The squelch signal is comprised of noise produced from WFM/NFM detector output, and amplified
bylC2 to the switching signal, which controls AF mute and the CPU.
Any unstable supply voltage to the CPU can produce a CPU malfunction, such as wrong data processing, wrong
data transfer, etc. To overcome this, the CPU can be initialized when necessary. Initialization is done when you
press the RESTART switch. Figure A shows the initializing waveform.
CX501 (8 MHz) is a clock which is used for CPU control. Figure B shows the clock waveform at IC501 pin 39.
The CPU output data displays the frequency and function on the LCD. The LCD is back-lighted with nine LEDs.
VDD
----------~----
VDD/2
- - - -
4.6V
- -
o
Reslart switch released
Figure A
- 5 -
Figure B
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