TTI LD300 Service Manual page 17

Remote Control
The external remote control voltage is applied to the unity gain instrumentation amplifier IC38
which removes the common mode component (up to ±100V is allowed). VR31 provides offset
adjustment. The analogue control range is 4·00V for nominal range (80 Amps etc.).
For External TTL mode (when the user applies a logic signal the remote input), IC20-A compares
the input voltage to the logic threshold of 1·5V and generates the corresponding digital signal
XOSC which is used to switch between the Level A and Level B settings in the level select
circuit.
A Remote Disable input is also provided. A logic high signal applied here causes enough current
in the LED of the opto-isolator IC34 to turn on its output transistor and pull down the input enable
signal IEN, preventing the load from being enabled.
Reference Voltage
IC55 produces a nominal 3·3V reference voltage which is reduced by VR30 to nominally 2378mV
and buffered by IC54 to the signal FS, which sets the Full Scale value of the front panel controls.
VR30 is adjusted so that the internal full-scale voltage exactly matches that produced at the
junction of R232 and R233 by a remote control input voltage of 4·096V (corresponding to 81·92
Amps etc.).
Transient Oscillator
The oscillator is a triangle wave generator based on integrating a constant current from the output
of IC17 into a timing capacitor. Three frequency ranges are provided and switched by IC6
according to the two FR signals. The amplitude of the triangle wave is about 2·23Vpp, determined
by the two threshold voltages set by R32 – R34 (about 75mV above 0V and 75mV below FS).
R39, Q2 and IC12-A convert the scaled frequency control voltage (after a calibration adjustment
for each range) to a bias current for the OTA IC17. The output current from this charges and
discharges the timing capacitor C35 (and C17 or C18 on the lower ranges). The voltage on this
capacitor is buffered by IC12-B.
The oscillator is synchronised to the assertion of IEN by the signal OSCGO (from the input
enable logic). When the oscillator is not required OSCGO is low and IC11-C holds the voltage on
the timing capacitor at FS. The output of IC10-B is low and IC11-A selects the low threshold.
When IEN goes high (and the slow start requirement is satisfied, so STRT is also high) OSCGO
goes high and releases the timing capacitor, which is then discharged by IC17 until its voltage
reaches the low triangle threshold and IC10-B changes state. The high triangle threshold is then
selected and the capacitor charges up until this threshold is reached when the cycle repeats.
A logic signal IOSC of the required duty cycle is produced by IC10-A, which compares the voltage
of the triangle wave to the scaled DTYV voltage buffered by IC14-B. When IOSC is low the level
select circuit passes LVLB to the slew rate generator; when it is high, LVLA passes through.
Level Select Circuit
IC7 passes one of four control levels through to the slew rate generator: LVLA, LVLB, REMV or
zero, as determined by the signals at its control inputs from IC8. The two sections of IC7 are in
parallel to minimise resistance.
REMV is scaled by R232 & R233 from 4·000 V to 2·323 V at rated maximum value (80 Amps
etc.).
The selection signals produced by IC8 are determined by the highest numbered of its inputs that
is asserted low. The state of all lower priority inputs is ignored, so overriding control is in the
following order:
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