6·2
6.2.4
Check of Clock Signal
In the ready status, that is, when the disk rotation is up to speed, observe the check
terminals "ClS" and "ClP" and confirm that the waveforms are as follows.
"CLS"
v
"ClP"
"'" (TTL)
1-
T
J
"0" (TTL)
V: OverO.SV
T: '.69JjstO.'Jjs
6.2.5
Inspection of PlO Circuit
In the ready status, observe check terminals "P2F" and "1/8" or the controller E
(CQEM) PCB and confirm that their waveforms are as follows.
I
I
1-
T1
-I
"1" (TTL)
"P2F"
' - - - - "0" (TTL)
I
I
1-
T2
-I
"'" (TTL)
"'/S"
' - - - - "0" (TTL)
T1:
105,,5 ±3%
T2:
1.69Jjs ±3%
B03P-4605-OOO3A ..•. B