Advanced Chipset Features Page - PCchips M787CLR User Manual

Mainboard User's Manual

Advanced Chipset Features Page

This page sets some of the parameters of the mainboard
components including the memory, and the system logic.
DRAM Timing By SPD
SDRAM Cycle Length
Bank Interleave
DRAM Clock
DRAM Drive Strength
System BIOS Cacheable
Video RAM Cacheable
Frame Buffer Size
AGP Aperture Size
OnChip USB
OnChip USB 2
USB Keyboard Support
OnChip Sound
OnChip Modem
PCI Master 0 WS Write
PCI#2 Access #1 Retry
AGP Master 1 WS Write
AGP Master 1 WS Read
Memory Parity/ECC Check
DRAM Timing By
This item allows you to enable or disable the
DRAM timing defined by the Serial Presence
SPD
Detect electrical.
SDRAM Cycle
This field enables you to set the CAS latency time
in HCLKs of 2/2 or 3/3. The system board
Length
designer should have set the values in this field,
depending on the DRAM installed. Do not change
the values in this field unless you change
specifications of the installed DRAM or the
installed CPU.
Bank Interleave This item allows you to enable or disable the Bank
Interleave function with 2 banks or 4 banks.
DRAM Clock
Enables the user to select the DRAM Clock.
DRAM Drive
This option determines the signal strength from
the mainboard for the installed DRAM.
Strength
System BIOS When enabled, the System BIOS will be cached
for faster execution.
Cacheable
22
Advanced Chipset Features
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3
Disabled
By Auto
High
Enabled
Enabled
8M
64M
Enabled
Disabled
Disabled
Auto
Auto
Enabled
Enabled
Disabled
Disabled
Disabled
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