Strapping Pins - Espressif Systems ESP32 Hardware Design Manuallines

Chapter 3. Schematic Checklist

3.7 Strapping Pins

At each startup or reset, a chip requires some initial configuration parameters, such as in which boot mode to load
the chip, etc. These parameters are passed over via the strapping pins. After reset, the strapping pins work as normal
function pins.
All the information about strapping pins is covered in
document, we will mainly cover the strapping pins related to boot mode.
After chip reset is released, the combination of GPIO0 and GPIO2 controls the boot mode. See Table
Control.
Boot Mode
Default Config
SPI Boot
1
Joint Download Boot
Signals applied to the strapping pins should have specific setup time and hold time. For more information, see Figure
Setup and Hold Times for Strapping Pins
Parameter Description
t Time reserved for the power rails to stabilize before the chip enable
SU
pin (CHIP_PU) is pulled high to activate the chip.
t Time reserved for the chip to read the strapping pin values after
H
CHIP_PU is already high and before these pins start operating as
regular IO pins.
Attention: Do not add high-value capacitors at GPIO0, otherwise, the chip may not boot successfully.
1
Joint Download Boot mode supports the following download methods:
• UART Download Boot
• SDIO Download Boot
Espressif Systems
Table 4: Boot Mode Control
and Table Description of Timing Parameters for Strapping
Fig. 14: Setup and Hold Times for Strapping Pins
Table 5: Description of Timing Parameters for Strapping Pins
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ESP32 Series Datasheet > Section Strapping Pins. In this
GPIO0
1
1
0
17
Boot Mode
GPIO2
0
Any value
0
Pins.
Minimum (ms)
0
3
Release master