HP E2465A PowerPC 604 PGA User Manual page 59

Preprocessor Interface Hardware Reference
Signal-to-Connector Mapping
Pod 2x20 Analyzer PGA Signal
pin
Bit
Pin# Name
P7
3 CLKl K17 XATS
P7 7 15
*
OurAddBus
P7 9 14
*
AddCnt2
P7 11 13
*
AddCntl
P7
13 12
*
AddCntO
P7 15 11
*
OurDatBus
P7 17
10
*
DatCnt2
P7
19 9
*
DatCntl
P7 21
8
*
DatCntO
P7 23 7 B9 HR ES ET
P7
25 6 D13 SR ES ET
P7 27
5 EB BR
P7 29 4
J5
BG
P7 31
3
L3
ABB
P7 33 2 Kl DBG
P7
35 1 L17 DBB
P7 37
0
J14
TEA
*These signals are generated by the preprocessor interface.
PB 3 CLKl C10 SYSCLK
PB 7 15 Ell TSIZO
PS
9
14
A15 TSIZl
PB 11 13 B15 TSIZ2
PS 13 12
E12
TBST
PS
15 11 A16
no
PS
17 10 C14 Til
PS 19 9 C16 TI2
PS 21
8
C17 TI3
PB 23 7 E15 TI4
PB 25
6 C6
TCO
PS 27
5 A5 TCl
PB 29 4 C7 TC2
PB 31 3 K3 AACK
PS 33 2 K5 ARTRY
PS 35 1 J16 TA
PB 37
0
J17 DRTRY
Analyzer Analyzer
Labels Labels
XATS
STAT oAdd
STAT Addc
STAT Addc
STAT Addc
STAT oDat
STAT Date
STAT
Date
STAT Date
STAT HRS ET
STAT
SR SET
STAT BR busarb
STAT BG busarb
STAT ABB busarb
STAT DBG busarb
STAT
DBB busarb
STAT TEA
SYSCLK
STAT TSIZ
STAT TSIZ
STAT TSIZ
STAT TSIZ TBST
STAT
TI
no
STAT
TI R/IN
STAT TI TI2
STAT
TI TI3
STAT TI TI4
STAT TC TCO
STAT TC TCl
STAT TC TC2
STAT AC Ks AACK
STAT AC Ks ARTRY
STAT AC Ks TA
STAT AC Ks DRTRY
3-10
E2465A Power PC 604 Preprocessor