Espressif Systems ESP Faq page 181

Chapter 5. Hardware related
5.3.46 Does it support to connect a second PSRAM chip externally based on the ESP32-
S3R8 chip?
• No, it is not supported. The reasons are as follows:
– The PSRAM chip is connected to the MSPI bus. There are only two CS signals from the MSPI peripheral,
one is connected to the flash, another is connected to the PSRAM.
– CPU accesses external memory via cache and MSPI. A GPSPI peripheral is not accessible cache.
5.3.47 Could you please provide the 3D model and Footprint files of the ESP32-S3-
WROOM-1 module?
• The 3D models and Footprint files for the modules are available under the
5.3.48 Does ESP32/ESP32-S2/ESP32-C3/ESP32-S3 support powering the RTC power
domain only to keep the chip working with low power consumption?
No, it is not supported. Take ESP32 as an example, detailed information will be updated to the RTC
chapter in ESP32 Hardware Design
5.3.49 How can I improve the EMC performance?
• At the hardware level, the following measures can be taken to improve the EMC performance of the PCB
board.
– The EMC performance with a four-layer board design will be better than a two-layer board hardware
design.
– Add filtering circuits to the power supply circuit.
– Add ESD or magnetic beads to the antenna circuit.
– Add a zero-ohm series resistor to the SPI Flash communication lines to lower the driving current, reduce
interference to RF, and adjust timing for better interference shielding.
– Keep GND intact as much as possible.
– For more hardware design suggestions, please refer to
5.3.50 Why do I need to connect a 499 Ω resistor to U0TXD for ESP32-S3?
• The 499 Ω resistor is reserved for the U0TXD to suppress 80 MHz harmonics. For more information, please
refer to 《ESP32 S3 Series Hardware Design
5.3.51 How to calibrate the ESP32-S3 ADC in hardware?
• The ESP32-S3 already has the ADC calibrated in hardware on the chip. ESP32-S3 ADCs can be sensitive
to noise, resulting in large differences in ADC readings. Depending on the usage scenario, you may need to
connect a bypass capacitor (e.g. 100 nF ceramic capacitor) to the ADC input pads for minimising noise. In
addition, multi-sampling can be used to further mitigate the effects of noise.
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Guidelines.
《ESP Hardware Design
Guidelines》.
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espressif/kicad-libraries library.
Guidelines》.
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