Texas Instruments 990 Maintenance Manual page 6

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Paragraph
4.2.15
4.2.16
4.2.17
4.2.18
4.2.19
4.2.20
4.2.21
4.2.22
4.3
4.3.1
4.3.2
4.3.3
4.4
4.4.1
4.4.2
4.4.3
4.4.4
4.4.5
5.1
5.2
5.3
5.4
5.4.l
TABLE OF CONTENTS (Continued)
Receive Go Flag . . . .
TTY /EIA Receive Switch
EIA Line Receivers
Receive Transition Detector
Receive Shift Register
Receive Buffer Register
Multiplexer . . . . .
Timing Error Flag . .
Detailed Interface Discussion
Title
Full Duplex TTY /EIA Module-to-Model 990 Computer Interface
Full Duplex TTY/EIA Module-to-Current Loop Device Interface
Full Duplex TTY/EIA Module-to-EIA Device Interface
Module Operation
Preparation to Transmit
Data Transmission
Interrupts
Data Reception
Testing . . . .
. General . . . . . . .
SECTION V. MAINTENANCE
Maintenance Philosophy
Special Test Equipment
Troubleshooting Procedures
Scoping Loops
LIST OF ILLUSTRATIONS
1-1 TTY/EIA Terminal Interface Module . . . . . . . . . .
1-2 Full Duplex TTY /EIA Interface Module Simplified Block Diagram
1-3 Asynchronous (START/STOP) Data Transmission Formats
2-1 Jumper Socket Locations . . . . . . . . . . . . . . . . . .
3-1 TTY /EIA Terminal Interface Module Addressable Input/Output Lines
3-2 Output Character Transfer
3-3
Input Character Transfer
34 Echo Character Sample Routine
3-5
Output Character String Sample Routine
4-1 TTY /EIA Terminal Interface Module Detailed Functional Block Diagram
4-2 Baud Rate Clock Logic Diagram
4-3 Transmit Shift Register Logic . . . . . . . .
4-4 Receive Go Latch Logic Diagram . . . . . .
4-5 Full Duplex TTY/EIA Module Interface Diagram
4-6
Full Duplex TTY /EIA Module Addressable Input Lines
4-7 Full Duplex TTY/EIA Module Addressable Output Lines
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Digital Systems Division