Texas Instruments 990 Maintenance Manual page 30

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4.2.5 TRANSMIT GO FLAG. The transmit go flag is a flip-flop that controls the gating of data
from the computer to a peripheral device. When set, the transmit go flag enables the transmit
shift clock generator and the transmit bit counter, causes the transmit shift register to be loaded
with ones, causes the transmit shift register to be clocked by Transmit Shift Clock (XSCLK), and
gates the output of the transmit shift register to the output logic. When reset, the transmit go
flag disables the transmit shift clock generator and transmit bit counter, allows CRUDATAOUT
to be loaded into the transmit shift register when clocked by STORECLK-, forces the transmit
shift register's output (XMTD) to logic 1 until the register is filled, and prepares SETGO- to set
the transmit go flag prior to the transmission of another data word by the computer. The
transmit go flag is reset by the transmit bit counter at the completion of each data word
transfer.
4.2.6 TRANSMIT SHIFT CLOCK GENERATOR. The transmit shift clock generator, a 4-bit
binary counter and two gates, produces, from DATACLK, Transmit Shift Clock (XSCLK), a
clock signal with a pulse width equal to that of DAT ACLK and a period 16 times as long as
DATACLK's. The frequency of XSCLK is equal to the transmit baud rate. The transmit shift
clock generator is active whenever the transmit go flag is set, and clocks the transmit bit counter
and the transmit shift register.
4.2. 7 TRANSMIT BIT COUNTER. The transmit bit counter consists of a 4-bit binary counter,
a jumper connection, and a gate. When the transmit go flag is set, the transmit bit counter
monitors Transmit Shift Clock (XSCLK) from the transmit shift clock generator. After counting
. I 0 or 11 Transmit Shift Clock pulses, depending upon the jumper connection, the transmit bit
counter issues STPXCK-
=
0 to reset the transmit go flag and set the write request flag.
4.2.8 TRANSMIT SIDFT REGISTER. The transmit shift register consists of an 8-bit parallel-out
shift register, a flip-flop, and an output gate. During the transfer of data from the computer to a
peripheral device, serial data (XMSRIN) is clocked into the shift register by XMSRCLK, then the
data is serially clocked through the flip-flop by Transmit Shift Clock (XSCLK) into the output
gate where it is gated to the peripheral device if the transmit go flag is set. During this data
transfer, the transmit shift register is clocked eight times by XMSRCLK
=
STORECLK, then I 0
or 11 times by XSCLK (depending upon the jumper plug connection in the transmit bit counter) to
clock the data from the shift register through the flip-flop. During the 10th or 11th XSCLK
pulses, ones are loaded into the shift register to provide the appropriate stop bits for either I
0-
or 11-bit code. Figure 4-3 shows the logic making up the transmit shift register.
4.2.9 CURRENT LOOP INTERFACE. The current loop interface circuitry allows the module to
transmit serial data (XMTD) to equipment using a 20-mA current loop interface. The current
loop interface circuitry converts the TTL-level data into Mark/Space data for the transmit
current loop.
4.2.10 DIAGNOSTIC LOOP LOGIC. The diagnostic loop logic consists of eight 2-to-1 selectors
(in two packages) and three inverters. During normal data transfer to a device requiring an EIA
interface, the diagnostic loop logic passes the output signals for the device to the EIA line
drivers. When the diagnostic mode latch is set, diagnostic loop logic gates the EIA output signals
to the input multiplexer for examination by the computer and gates ones to the EIA line drivers.
4.2.11 EIA LINE DRIVERS. The two packages of EIA line drivers convert the TTL-level signals
at their inputs into signals having voltage levels compatible with EIA Standard RS-232C.
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Digital Systems Division