Advertisement
VGACNT register
Bit
Signal name
Significance
0
POLIN V
RS-232C inpuVoutput polarity inversion
1
DISVGA
Internal VGA on/off setting
2, 3
PWRDWN1,2
VGA controller mode setting
4-7
RESERVED
Reserved. Read/write possible
Table 4-19
When reset, all are reset to "0".
To-reset the internal modem that can be installed within the machine,
the output from the MORSTN line is used. The i-bit output of the
MORSTN output port can be switched with the port select signal
output using OUTSEL of the MDMCFR register. When OUTSEL is at
"1", the bit 3 of the
110
address 2D2H port is issued, When "0", the
decoded signal of the I/O address 2D2H is issued as a port select
signal. The' 202H port is a read/write internal
110
register whose big
definition is shown Table 4-20.
202H port
Bit
Signal name
Significance
0-2
RESERVED
Reserved. Read/write possible
3
MORSTN
Internal modem reset signal
4
RESERVED
Reserved. Read/write possible
5·7
-
Undefined. Reads "0" at all times,
Table 4-20
When reset, bits
D~4
are reset.
4-2-7. RTC and CMOS RAM control
For this chip, RTC is controlled by AS, DS, RIW, and SCRTCN out-
puts. For setup expansion, a 2KB CMOS RAM is provided.
Among 11 bits address input of the 2KB CMOS RAM, the low 6 bits is
connected to the 1/0 070H port bits 0·5, and high 5 bits to the latch
address bits 10·14. Which is to be selected, RTC or CMOS RAM,
when the I/O 071 H port is accessed is determined by the data in the
110
70H bit
6.
When "0", RTC is selected and "1" the CMOS RAM.
See Fig. 4-8 for the mapping of the RTC and the CMOS RAM.
JlO XX71 H PORT
0071 H
0471 H
0871 H
OOOH
110
070H
040H
PORT
07FH
4-2-8. Port-B
RTC
RAM
CMOS
RAM
r::1r::1
LJLJ
Fig. 4-8
7871H
7C71H
r::1r::1
. . . . - - LJ LJ
The port-B consists of a logic gate which is u.sed for NMI qccqrrence
control, speaker output control, and refresh detection by the parity
and
1/0
channel checks.
4-2-9. Power con.trol
The system power source is divided into several blocks to allow each
block to be turned on/off separately. Therefore, the power control
-.----------Sectionls.e.quipped.wl1b.t/'IJLRort
tojI.!rr:lJ2fL!lt~we~
sections which
are not used. For that purpose, VLCCNT, VBLCNT, VMDCNT,
VIFCNT, VCCOFF, and 'ONRSM are provided. The state where the
power is supplied but no operation is requested is detected and
if
the
state continues for a certain period, the power is automatically turned
off.
-
-25-
-
l 'C-6220
For the power control port, a part of SOP (Sharp Original Port)
as~
signed to D7Ch and D7Dh is used. Port number (called as index) is
written into D7Ch of SOP and read/write is made with the data in
D70h. When D7Dh is accessed, the index is cleared to be No. D.
therefore D7Ch must be set for each time. SOP related to the power
control section is shown in Table 4-21 through 4-30.
PWRCNT register (Index 06Ch, RIW)
Bit
Signal name
Meaning
0
PCVIF
Printer/RS-232C interface IC control
1
PCVLCD
VGA controller and LCD power control
2
PCVCC
System power (Vee) control
3
PCBL
Back light power control
4
PCVMD
MODEM power control
5-7
RESERVED
Reservation bit, Read/Write allowed
Table 4-21
When resetting, each bit of PCVIF, PCVCC, PCBL, and PCVMD are
set to "1" and the others are reset.
ATSTBY register (Index 07Ch, RIW)
Bit
Signal name
Meaning
0
ASVIF
Auto IIF power off enable/disable setting
1
ASLCD
Auto power save enable/disable setting
2
ASVCC
Auto resume enable/disable setting
3-7
RESERVED
Reservation bit. ReadlWrite allowed
Table 4-22
When resetting, all are reset to "D."
RWRSTAT register (Index 08Ch, RIO)
Bit
Signal name
Meaning
0
PSVIF
Printer/RS-232C interface
Ie
control state
1
PSLCD
LCD power (VLCD) state
2
PSVCC
System power (Vcc) state
3
PSBL
Back light power (VBL) state
4
PSVMD
MODEM power (VMDM) state
5-7
-
Reservation bit. Always reads "0."
Table 4-23
PWRTlM register (Index 09h, RIW)
Bit
Signal name
Meaning
0-3
PSTO - 3
Auto power save time setting
4-7
RESERVED
Reservation bit, read/write allowed.
Table 4·24
When resetting, PST3 - 0 are set to "1," and the others are reset. ,
RSMTIM register (Index OAh, RIW),
Bit
Signal name
Meaning
0-6
ARTO-6
Auto resume time setting
7
RESERVED
Reservation bit, Read/Write allowed,
Table 4-25
When resetting, ART6 - 0 are set to "1 ," and bit 7 is reset.
RSMCNT register (Index OBh, RIW)
Bit
Signal name
Meaning
0
RSMEN
Resume mode setting
-1---
. C1Et-J--- ..Reservalioubil,.raadlwrite. aUowed .
2
MRIEN
Reservation bit, read/write allowed.
3-7
RESERVED
Reservation bit, read/write allowed.
Table 4-26
When resetting, all are reset to "0."
.
Advertisement
Chapters
