Table of Contents
Advertisement
bq77910A EVM Circuit Description and Configuration
7.9
Output Protection Components
D10 is an inductive clamp diode also known as a flyback or freewheel diode. It would conduct if the
discharge FET opens with an inductive load to clamp the DSG– to the BATT+. Note that inductance of the
cells and interconnect is clamped by D9, but load current is handled by D10. D11 prevents CHG– from
significantly exceeding BATT+. It provides an inductive load clamp in the series FET configuration when
D10 is likely removed. Also in the series FET configuration D11 shorts a reversed charger after the FETs
open.
The EVM contains some features to avoid ESD on several of the signals that come to the output side of
the board. Spark gaps are provided at most outputs. Pairs of series capacitors bypass most signals to
CHG–. If one capacitor is shorted, the other may remain functional. ESD performance of the EVM was not
tested, the user should test their system to applicable standards.
7.10 Reserved Pins
Pins 23, 24 and 25 of the bq77910A must be tied to GND for normal operation of the device. In an
application these might normally be tied directly to VSS, on the EVM they are individually pulled down for
possible future use. Pin 30 should not be connected in normal operation. The EVM provided the R30
pattern for possible future use, this would be omitted for normal designs. Pins 2, 4, and 37 are not
connected.
7.11 Flag Outputs
CHGFLAG and DSGFLAG are signals output from the board for indicating the CHG and DSG pin status.
These are isolated from the device pins by R39 and R34 which should prevent excessive loading from
shorting the device pins and forcing the FETs off. D6 and D5 prevent current from the board connector
pins from driving the device or turning on the FETs due to external connections. If used for monitoring the
status these should have some large value pull down. Note the reference level of the CHGFLAG will vary
with CHG– when the charge FET is off. If the board is configured to not use a FET and the flag terminals
are used as outputs, the appropriate diode can be shorted and resistors adjusted as needed.
7.12 Thermal Sensor
The thermal protection on the bq77910AEVM circuit module is set to provide a trip threshold between 65
and 70°C with nominal values. Component tolerances and substitute values may alter this trip point. An
on-board thermistor RT1 is mounted near the center top of the board. If RT1 is removed an off-board
thermistor could be connected at J7 or J8 and used for sensing temperature closer to the cells. To adjust
the value of the trip point, change the value of R27: Trip ratio is nominally 0.2 = R
consider component and device tolerances as needed for your design. C15 provides some filtering for TS
on switching of VTSB, its value can vary but it should not be so large that it prevents the TS signal from
stabilizing before temperature measurement. A charger could access the thermistor through J7 and R28.
R28 provides for some isolation of the external connection, but is small to reduce error. Adjust R28 as
needed for evaluation or the system design.
7.13 ZEDE
ZEDE is the zero delay test mode control pin of the bq77910A. This pin also provides the Communication
enable to the device for programming and checking the device status. R37 provides a pull down for ZEDE
for normal operation. R9 connects the pin to J3 to allow control by a communication interface. The TI
USB-TO-GPIO Interface Adapter has a weak pull up for the signal used to control ZEDE, so the 100k
value of R37 is larger than the strong pull down recommended by the datasheet. Connecting J6 pins 2 to
3 will provide a lower value pull down of ZEDE through R23 if needed for evaluation, but will prevent data
access by the TI Interface Adapter. Connecting J6 pins 1 to 2 will pull up ZEDE to test zero delay mode
and allow communication with hosts which do not control ZEDE.
7.14 Programming Interface
The serial communication interface is connected to J3 with isolation resistors R12 to R15. D3 provides
ESD protection. R16 and R17 pull the lines low when not connected. Pull up resistors for communication
with the EVM must be provided by the host or other off-board connection.
22
bq77910AEVM
Copyright © 2012, Texas Instruments Incorporated
www.ti.com
/(R
+ R27);
T(trip)
T(trip)
SLUU855 – February 2012
Submit Documentation Feedback
Advertisement
Table of Contents
