Table of Contents
Advertisement
9150-0125-01 R-4
4.2.3
PDM - Pulse Density modulation interface
The pulse density modulation (PDM) module enables input of pulse density modulated signals from external
audio frontends, for example, digital microphones. The PDM module generates the PDM clock and supports
single-channel or dual-channel (Left and Right) data input. Data is transferred directly to RAM buffers using
EasyDMA.
Listed here are the main features for PDM:
• Up to two PDM microphones configured as a Left/Right pair using the same data input
• 16 kHz output sample rate, 16-bit samples
• EasyDMA support for sample buffering
• HW decimation filters
• Selectable ratio of 64 or 80 between PDM_CLK and output sample rate
4.2.4
PPI - Programmable Peripheral Interconnect
The programmable peripheral interconnect (PPI) enables peripherals to interact autonomously with each other
using tasks and events independent of the CPU. The PPI allows precise synchronization between peripherals
when real-time application constraints exist and eliminates the need for CPU activity to implement behavior
which can be predefined using PPI.
On each PPI channel, the signals are synchronized to the 16 MHz clock, to avoid any internal violation of setup
and hold timings. As a consequence, events that are synchronous to the 16 MHz clock will be delayed by one
clock period, while other asynchronous events will be delayed by up to one 16 MHz clock period.
Note that shortcuts (as defined in the SHORTS register in each peripheral) are not affected by this 16 MHz
synchronization, and are therefore not delayed.
4.2.5
PWM - Pulse Width Modulation
The pulse with modulation (PWM) module enables the generation of pulse width modulated signals on GPIO.
The module implements an up or up-and-down counter with four PWM channels that drive assigned GPIOs.
The following are the main features of a PWM module:
• Programmable PWM frequency
• Up to four PWM channels with individual polarity and duty cycle values
• Edge or center-aligned pulses across PWM channels
• Multiple duty cycle arrays (sequences) defined in RAM
• Autonomous and glitch-free update of duty cycle values directly from memory through EasyDMA (no CPU
involvement)
• Change of polarity, duty cycle, and base frequency possibly on every PWM period
• RAM sequences can be repeated or connected into loops
4.2.6
QDEC - Quadrature Decoder
The Quadrature decoder (QDEC) provides buffered decoding of quadrature-encoded sensor signals. It is suitable
for mechanical and optical sensors.
The sample period and accumulation are configurable to match application requirements. The QDEC provides
the following:
• Decoding of digital waveform from off-chip quadrature encoder.
• Sample accumulation eliminating hard real-time requirements to be enforced on application.
• Optional input de-bounce filters.
• Optional LED output signal for optical encoders.
The QDEC decodes the output from an incremental motion encoder by sampling the QDEC phase input pins (A
and B). The off-chip quadrature encoder is an incremental motion encoder outputting two waveforms, phase A
and phase B. The two output waveforms are always 90 degrees out of phase, meaning that one always changes
level before the other. The direction of movement is indicated by which of these two waveforms that changes
level first.
ST150M User Manual
Confidential & Proprietary Information
20
Advertisement
Table of Contents
