9150-0125-01 R-1
SYMBOL
VIH
VIL
VOH
VOL
Current at VSS+0.4 V, output
IOL,SD
set low, standard drive
Current at VSS+0.4 V, output
IOL,HDH
Current at VDD-0.4 V, output
IOH,SD
set high, standard drive
Current at VDD-0.4 V, output
IOH,SD
RPU
Internal Pull-up Resistance
RPD
Internal Pull-down Resistance
4.2.2 COMPARATOR
The comparator (COMP) compares an input voltage (VIN+) against a second input voltage (VIN-). VIN+ can be derived from an
analog input pin (AIN0-AIN7). VIN- can be derived from multiple sources depending on the operation mode of the comparator.
Main features of the comparator are:
•
Input range from 0 V to VDD
•
Single-ended mode
•
Fully flexible hysteresis using a 64-level reference ladder
•
Differential mode
•
Configurable 50 mV hysteresis
•
Reference inputs (VREF): VDD
•
External reference from AIN0 to AIN7 (between 0 V and VDD)
•
Internal references 1.2 V, 1.8V and 2.4V
•
Three speed/power consumption modes: low-power, normal and high-speed
•
Single-pin capacitive sensor support
•
Event generation on output changes
•
UP event on VIN- > VIN+
•
DOWN event on VIN- < VIN+
•
CROSS event on VIN+ and VIN- crossing
•
READY event on core and internal reference (if used) ready
4.2.3 PDM - PULSE DENSITY MODULATION INTERFACE
The pulse density modulation (PDM) module enables input of pulse density modulated signals from external audio frontends,
for example, digital microphones. The PDM module generates the PDM clock and supports single-channel or dual-channel
(Left and Right) data input. Data is transferred directly to RAM buffers using EasyDMA.
ST150M User Manual
DESCRIPTION
Input High Voltage
Input Low Voltage
Output High Voltage
Output Low Voltage
set low, high drive
set high, high drive
MIN
TYP
0.7VDD
–
VSS
–
2.9
–
VSS
–
1
2
6
10
1
2
6
9
11
13
11
13
Confidential & Proprietary Information
MAX
UNITS
VDD
V
0.3VDD
V
VDD
V
0.4
V
4
mA
15
mA
4
mA
14
mA
16
kOhm
16
kOhm
11