Schematic; Evm Setup; Jumper Connections; Figure 2-1. Ua78Levm-075 Schematic - Texas Instruments UA78LEVM-075 User Manual

Table of Contents

Advertisement

www.ti.com

2 Schematic

Figure 2-1
shows the schematic for the UA78LEVM-075.
J1
In
Vin
5
4
1
3
2
2
DNP
J5
J3
J7
GND

3 EVM Setup

This section describes how to properly connect and setup the UA78LEVM-075, including the jumpers and
connectors on the EVM board. See

3.1 Jumper Connections

3.1.1 J1
J1 is an input jumper.
3.1.2 J2
J2 is an output jumper.
3.1.3 J3
J3 is a VIN/GND input screw terminal.
3.1.4 J4
J4 is a VOUT/GND output screw terminal.
3.1.5 J5
J5 is an SMA VIN_Sense connector.
3.1.6 J6
J6 is an SMA VOUT_Sense connector.
3.1.7 J7
J7 is a GND jumper.
3.1.8 J8
J8 is a GND jumper.
3.1.9 J9
J9 is a test point jumper. Pin 1 is tied to VIN, pin 2 is tied to GND, and pin 3 is tied to VOUT.
SLVUCG1 – DECEMBER 2022
Submit Document Feedback
U1
TP1
3
INPUT
UA78L05CPK
C1
C2
C3
DNP
63V
1µF
330nF
10uF
50V
50V
TP3
J9
In
1
2
DNP
Out
3
GND
22284030

Figure 2-1. UA78LEVM-075 Schematic

Section 4
for the proper connections of test equipment.
Copyright © 2022 Texas Instruments Incorporated
TP2
1
OUTPUT
2
COMMON
C4
100nF
50V
TP4
GND
Schematic
Out
5
4
3
2
C5
C6
DNP
DNP
2
1
1µF
63V
J6
50V
10uF
J4
UA78LEVM-075 Evaluation Module
J2
Vout
J8
GND
3

Advertisement

Table of Contents
loading

Table of Contents