Revision history
Date
09-Jul-2020
1-Sep-2020
22-Jul-2021
14-Dec-2021
48/49
Table 4. Document revision history (continued)
Revision
Added
to be configured
selection
Updated
parameters.
Added
dual bank products
after bank
5
Updated
UserApp specific linker file (NUCLEO-L476RG example)
and
Updated
configuration,
Section 7.2: Optimizing memory mapping
Removed Figure 28 Example of memory mapping
optimization on the NUCLEO-G031K8 – 1 image.
Added:
–
–
–
6
–
–
Updated:
– Secure element STSAFE-A100 replaced by STSAFE-
Added:
–
–
Updated:
–
7
–
Removed:
– Former Section 8.4 How to replace the standalone
Updated:
–
8
–
–
AN5056 Rev 8
Changes
OTFDEC information in
and
Section 4.2: Cryptographic scheme
(added one note)
Section 3.2.2: Firmware image slot definition
Figure 8: Firewall configuration constraint on
and
Figure 9: Firewall configuration
swap.
Figure 11: SBSFU specific linker
Figure 13: SBSFU
configuration.
Section 4.4: Development or production mode
Section 6.2: Memory mapping
Section 3.2.4: Multiple image configuration
Section 3.3: Dual-core adaptation
Section 7.3: How to activate interruption management
inside the firewall isolated environment
Section 7.4: How to improve boot time
Section 8.6: How to validate a firmware image
A110
Section 3.2.2: Firmware image slot definition
parameters
SFU_IMAGE_OFFSET value for
STM32H7 Series
Section 4.1: Features to be configured
memory without on-the-fly decryption
Section 3.2: Memory mapping definition
Section 5.1: Generating a new firmware AES
encryption key
references to UM2262
Section 5.3: STM32WB Series specificities
Figure 24: Key provisioning
loader with a BLE OTA loader
Section 4.1: Features to be configured
STM32WB5MM-DK Discovery board
Section 5.3: STM32WB Series specificities
boot mode on P-NUCLEO-WB55 Nucleo and
STM32WB5MM-DK Discovery boards
Section 8.5: How to validate a firmware image
AN5056
Section 4.1: Features
file,
Figure 12:
adaptation,
External Flash
and
with added
for
to select
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