Working Principle And Signal Flow - Huawei ATN 950B Hardware Description

ATN 950B Multi-service Access Equipment
Hardware Description
Function and Feature
ML-PPP
Clock

5.6.3 Working Principle and Signal Flow

The AND1ML1/AND1ML1A mainly consists of the control module, line-side processing
module, system-side processing module, backplane interface module, clock module, and power
supply module.
Figure
Figure 5-11 Block diagram for the working principle of the AND1ML1/AND1ML1A
16
In Transmit Direction
The AND1ML1/AND1ML1A first distributes the signals in Ethernet packets from the backplane
to different protocol processing chips according to the service types. The system-side processing
Issue 03 (2012-07-23)
5-11shows the block diagram for the working principle of the AND1ML1/AND1ML1A.
x Line-side
E1 signals
processing
module
To each module
Huawei Proprietary and Confidential
Copyright © Huawei Technologies Co., Ltd.
Remarks
Number of supported ML-
PPP groups
Maximum number of links
supported by each ML-PPP
group
Functions as the UNI interface to access IP packets of the
L3VPN services.
Physical Synchronization
1.2 V
1.26 V
To each module
2.5 V
3.3 V
Service
System-side
bus
processing module
Management bus
Management bus
Clock signals
5 Physical Interface Card
8
16
Supported
Power supply
module
Service
Service bus
Backplane
bus
interface
Service bus
module
Serial
management
bus
Control module
Clock signals
Clock module
Backplane
-48 V/-60 V
-48 V/-60 V
3.3 V
Active CXP
Standby CXP
CXP
CXP
63